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Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

3D illustration featuring top and bottom views of SSOP chip package with 48 lead count.

9P960AFLF

Obsolete
Dual Channel DDRII/III Zero Delay Buffer
9P960 DatasheetLearn more about 9P960

Package Information

CAD Model:View CAD Model
Pkg. Type:SSOP
Pkg. Code:PVG48
Lead Count (#):48
Pkg. Dimensions (mm):15.9 x 7.5 x 2.3
Pitch (mm):0.64

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)48
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)30
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)0 to 70°C
Accepts Spread Spec InputYes
Advanced FeaturesAccepts Spread Spec Input, Reference Output
App Jitter ComplianceDDR2, DDR3
C-C Jitter Max P-P (ps)40
Core Voltage (V)1.5V, 1.8V
Delay ModeVariable
Die FormNo
Diff. Input SignalingSSTL-2
Diff. Output SignalingSSTL-2
Input Freq (MHz)150
Length (mm)15.9
MOQ120
Output Banks (#)2
Output Freq Range (MHz)150
Output Skew (ps)60
Output TypeSSTL-2
Output Voltage (V)1.5V, 1.8V
Outputs (#)6
Package Area (mm²)119.3
Period Jitter Max P-P (ps)30
Pitch (mm)0.64
Pkg. Dimensions (mm)15.9 x 7.5 x 2.3
Pkg. TypeSSOP
Product CategoryZero Delay Buffers
Reference OutputYes
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumNo
Tape & ReelNo
Thickness (mm)2.3
Width (mm)7.5

Description

Dual Channel DDRII/III Zero Delay Buffer

Learn more about 9P960