Features
- Supports output clock frequencies up to 400 MHz
- 4 Selectable SMBus addresses
- SMBus address is independent of PLL operating mode
- Dedicated CKPWRGD/PD# and VDDA pins ease board design
Description
The IDT9EX21501 provides 15 output clocks for PCIe Gen2 (100MHz) or QPI (133MHz) applications. The 9EX21501 has 4 selectable SMBus addresses, and dedicated CKPWRGD/PD# and VDDA pins for easy board design. A differential CPU clock from a CK410B+ main clock generator, such as the IDT932S421, drives the IDT9EX21501. In fanout mode, the 9EX21501 provides outputs up to 400MHz.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Power Consumption Typ (mW) | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 9EX21501AKILF | Obsolete | N/A | Out of Stock | VFQFPN | 64# | Tray | 3 | 1396mW | 0 | 207# | Yes | e3 Sn | -40 to 85°C |
| 9EX21501AKILFT | Obsolete | N/A | Out of Stock | VFQFPN | 64# | Reel | 3 | 1396mW | 3000# | 0 | Yes | e3 Sn | -40 to 85°C |
| 9EX21501AKLF | Obsolete | N/A | In Stock | VFQFPN | 64# | Tray | 3 | 1106mW | 0 | 207# | Yes | e3 Sn | 0 to 70°C |
| 9EX21501AKLFT | Obsolete | N/A | Out of Stock | VFQFPN | 64# | Reel | 3 | 1106mW | 3000# | 0 | Yes | e3 Sn | 0 to 70°C |
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- Application NotePDF 170 KB 7WDXRDKU4E7E-5-57318 May 13, 2014
- Application NotePDF 1.9 MB 7WDXRDKU4E7E-5-57315 May 13, 2014
- Application NotePDF 495 KB 7WDXRDKU4E7E-5-57312 May 12, 2014
- Application NotePDF 442 KB 7WDXRDKU4E7E-5-57298 May 08, 2014
- End Of Life NoticePDF 606 KB 7WDXRDKU4E7E-5-62524 Nov 29, 2017
- End Of Life NoticePDF 599 KB 7WDXRDKU4E7E-5-61808 Aug 24, 2017
- Product Change NoticePDF 583 KB 7WDXRDKU4E7E-5-61343 Dec 20, 2016
- Product Change NoticePDF 95 KB 7WDXRDKU4E7E-5-59609 Oct 22, 2015
- Product Change NoticePDF 50 KB 7WDXRDKU4E7E-5-59245 Jul 21, 2015
- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
Recommended Documents (1)
Datasheets (1)
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- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
- Application NotePDF 170 KB 7WDXRDKU4E7E-5-57318 May 13, 2014
- Application NotePDF 1.9 MB 7WDXRDKU4E7E-5-57315 May 13, 2014View More (8)
Application Notes & White Papers (8)
- End Of Life NoticePDF 606 KB 7WDXRDKU4E7E-5-62524 Nov 29, 2017
- End Of Life NoticePDF 599 KB 7WDXRDKU4E7E-5-61808 Aug 24, 2017
- Product Change NoticePDF 583 KB 7WDXRDKU4E7E-5-61343 Dec 20, 2016
- Product Change NoticePDF 95 KB 7WDXRDKU4E7E-5-59609 Oct 22, 2015
- Product Change NoticePDF 50 KB 7WDXRDKU4E7E-5-59245 Jul 21, 2015View More (7)
Product Notices (PCN, EOL, etc) (7)
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This is the first video in our PCIe series. In this video, we define PCIe architectures, focusing on common and separate clock architectures. Watch the rest of the video series below where Ron will cover the impact of different timing architectures.
In this episode, Ron Wade from IDT (acquired by Renesas) explains PCIe common clocking and its impact on timing solutions. Learn about using a single clock source, fan-out buffers, and the considerations for spread spectrum and non-spread spectrum clocking in PCIe systems.
In this video, we explore PCIe with separate reference clocks and the effects of clock selection. Learn how separate reference clocks work and their impact on system performance and stability.
This video provides a high-level overview of Separate Reference Clock with Independent Spread (SRIS) architectures for PCI Express systems, additional performance requirements that this clocking architecture imposes on the reference clocks, and some system implications encountered trying to implement the architecture.