Package Information
| Lead Count (#) | 28 |
| Pkg. Dimensions (mm) | 9.7 x 4.4 x 1.0 |
| Pkg. Code | PGG28 |
| Pitch (mm) | 0.65 |
| Pkg. Type | TSSOP |
Environmental & Export Classifications
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | NLR |
| HTS (US) | 8542390001 |
Product Attributes
| Lead Count (#) | 28 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 50 |
| Package Area (mm²) | 42.7 |
| Pkg. Dimensions (mm) | 9.7 x 4.4 x 1.0 |
| Power Consumption Typ (mW) | 380 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range | -40 to +85°C |
| Price (USD) | 1ku | 2.53416 |
| Accepts Spread Spec Input | Yes |
| Advanced Features | HW PLL mode control |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2 |
| Architecture | Common |
| C-C Jitter Max P-P (ps) | 50 |
| Chipset Manufacturer | Intel |
| Chipset Name | DB400v2 |
| Core Voltage (V) | 3.3 |
| Country of Assembly | Taiwan |
| Country of Wafer Fabrication | Singapore |
| Diff. Input Signaling | HCSL |
| Diff. Inputs | 1 |
| Diff. Output Signaling | HCSL |
| Diff. Outputs | 4 |
| Diff. Termination Resistors | 16 |
| Feedback Input | No |
| Function | Zero Delay Buffer |
| Input Freq (MHz) | 33 - 400 |
| Input Type | HCSL |
| Inputs (#) | 1 |
| Length (mm) | 9.7 |
| MOQ | 200 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 33 - 400 |
| Output Skew (ps) | 50 |
| Output Type | HCSL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 4 |
| PLL | Yes |
| Phase Jitter Max RMS (ps) | 0.100 |
| Phase Jitter Typ RMS (ps) | 0.000 |
| Pitch (mm) | 0.65 |
| Pkg. Type | TSSOP |
| Prog. Clock | No |
| Prog. Interface | SMBUS |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
Description
The 9DB403 is compatible the Intel DB400 Differential Buffer Specification v2.0. This buffer provides four PCI-Express SRC clocks. The 9DB403 is driven by a differential input pair from a CK409/CK410/CK505 main clock generator.