Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NBG28 |
| Lead Count (#): | 28 |
| Pkg. Dimensions (mm): | 5.0 x 5.0 x 0.8 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 28 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 490 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Additive Phase Jitter Typ RMS (fs) | 82 |
| Additive Phase Jitter Typ RMS (ps) | 0.082 |
| Adjustable Phase | No |
| Channels (#) | 1 |
| Core Voltage (V) | 3.3 |
| Family Name | 8SLVD |
| Function | Buffer, Multiplexer |
| Input Freq (MHz) | 2000 |
| Input Type | LVPECL, LVDS |
| Inputs (#) | 2 |
| Lead Compliant | No |
| Length (mm) | 5 |
| Longevity | 2040 Apr |
| MOQ | 490 |
| Noise Floor (dBc/Hz) | -160 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 2000 |
| Output Skew (ps) | 20 |
| Output Type | LVDS |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 8 |
| Package Area (mm²) | 25 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 5.0 x 5.0 x 0.8 |
| Pkg. Type | VFQFPN |
| Product Category | Clock Buffers & Drivers, Clock Multiplexers, RF Buffers |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 0.8 |
| Width (mm) | 5 |
The 8SLVD1208-33I is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very-low additive phase noise clock and data signals. The 8SLVD1208-33I is characterized to operate from a 3.3V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVD1208-33I ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and eight low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.
For a 2.5V version of this device, please refer to the 8SLVD1208I.