Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG40 |
| Lead Count (#): | 40 |
| Pkg. Dimensions (mm): | 6.0 x 6.0 x 0.9 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 40 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 0 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 6.0 x 6.0 x 0.9 |
| Qty. per Carrier (#) | 490 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C (Tc ≤ 105°C) |
| Country of Assembly | TAIWAN |
| Country of Wafer Fabrication | SINGAPORE |
| 105°C Max. Case Temp. | 1 |
| Additive Phase Jitter Typ RMS (fs) | 45 |
| Additive Phase Jitter Typ RMS (ps) | 0.045 |
| Adjustable Phase | No |
| Advanced Features | Dual Buffer, Output Amplitude Control |
| Channels (#) | 2 |
| Core Voltage (V) | 1.8 |
| Family Name | 8P34S |
| Function | Buffer |
| Input Freq (MHz) | 2000 |
| Input Type | LVPECL, LVDS, LVCMOS |
| Inputs (#) | 2 |
| Length (mm) | 6 |
| MOQ | 490 |
| Noise Floor (dBc/Hz) | -160 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 2000 |
| Output Skew (ps) | 40 |
| Output Type | LVDS |
| Output Voltage (V) | 1.8V, 2.5V |
| Outputs (#) | 12 |
| Package Area (mm²) | 36 |
| Pkg. Type | VFQFPN |
| Price (USD) | $12.32 |
| Product Category | Clock Buffers & Drivers, RF Buffers |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 1.8 - 1.8, 2.5 - 2.5 |
| Tape & Reel | No |
| Thickness (mm) | 0.9 |
| Width (mm) | 6 |
The 8P34S2106 is a high-performance, low-power, differential dual 1:6 LVDS output 1.8V/2.5V fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available, each channel has six low-skew outputs. High isolation between channels minimizes noise coupling. AC characteristics such as propagation delay are matched between channels. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S2106 ideal for clock distribution applications demanding well-defined performance and repeatability. The device is characterized to operate from a 1.8V/2.5V power supply. The integrated bias voltage references enable easy interfacing of AC coupled signals to the device inputs.