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Low Skew,1-to-8,Differential-to-LVDS Clock

Package Information

Pkg. Type: TSSOP
Pkg. Code: PGG24
Lead Count (#): 24
Pkg. Dimensions (mm): 7.8 x 4.4 x 1.0
Pitch (mm): 0.65

Environmental & Export Classifications

Moisture Sensitivity Level (MSL) 1
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

Product Attributes

Lead Count (#) 24
Carrier Type Tube
Moisture Sensitivity Level (MSL) 1
Qty. per Reel (#) 0
Qty. per Carrier (#) 62
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) 0 to 70°C
Additive Phase Jitter Typ RMS (fs) 167
Additive Phase Jitter Typ RMS (ps) 0.167
Core Voltage (V) 3.3
Function Buffer
Input Freq (MHz) 0 - 700
Input Type HCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#) 1
Length (mm) 7.8
MOQ 124
Output Banks (#) 1
Output Freq Range (MHz) 0 - 700
Output Skew (ps) 50
Output Type LVDS
Output Voltage (V) 3.3
Outputs (#) 8
Package Area (mm²) 34.3
Pitch (mm) 0.65
Pkg. Dimensions (mm) 7.8 x 4.4 x 1.0
Pkg. Type TSSOP
Published No
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Thickness (mm) 1.0
Width (mm) 4.4

Description

The 85408 is a low skew, high performance 1-to-8 Differential-to-LVDS Clock Distribution Chip from IDT. The 85408 CLK, nCLK pair can accept most differential input levels and translates them to 3.3V LVDS output levels. Utilizing Low Voltage Differential Signaling (LVDS), the 85408 provides a low power, low noise, low skew, point-to-point solution for distributing LVDS clock signals. Guaranteed output and part-to-part skew specifications make the 85408 ideal for those applications demanding well defined performance and repeatability.