Features
- Dual differential 3.3V LVPECL outputs
- Selectable CLK, nCLK or LVCMOS/LVTTL TEST_CLK
- TEST_CLK can accept the following input levels: LVCMOS or LVTTL
- CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
- CLK, nCLK or TEST_CLK maximum input frequency: 40MHz
- Output frequency range: 25MHz to 700MHz
- VCO range: 250MHz to 700MHz
- Accepts any single-ended input signal on CLK input with resistor bias on nCLK input
- Parallel interface for programming counter and output dividers
- RMS period jitter: 5ps (maximum)
- Cycle-to-cycle jitter: 25ps (maximum)
- 3.3V supply voltage
- 0°C to 70°C ambient operating temperature
Description
The 8432-101 is a general purpose, dual output Differential-to-3.3V LVPECL high frequency synthesizer. The 8432-101 has a selectable TEST_CLK or CLK, nCLK inputs. The TEST_CLK input accepts LVCMOS or LVTTL input levels and translates them to 3.3V LVPECL levels. The CLK, nCLK pair can accept most standard differential input levels. The VCO operates at a frequency range of 250MHz to 700MHz. The VCO frequency is programmed in steps equal to the value of the input differential or single ended reference frequency. The VCO and output frequency can be programmed using the serial or parallel interfaces to the configuration logic. The low phase noise characteristics of the 8432-101 makes it an ideal clock source for Gigabit Ethernet and SONET applications.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 8432DY-101LF | Obsolete | N/A | In Stock | TQFP | 32# | Tray | 3 | 0 | 250# | Yes | e3 Sn | 0 to 70°C |
| 8432DY-101LFT | Obsolete | N/A | Out of Stock | TQFP | 32# | Reel | 3 | 2000# | 0 | Yes | e3 Sn | 0 to 70°C |
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