Features
- Eighteen LVCMOS/LVTTL outputs, 23Ω typical output impedance
- Selectable LVCMOS_CLK or LVPECL clock inputs
- PCLK, nPCLK pair can accept the following differential input levels: LVPECL, SSTL
- LVCMOS_CLK supports the following input types: LVCMOS or LVTTL
- Maximum output frequency: 175MHz
- Additive phase jitter, RMS: 0.108ps (typical), 3.3V/3.3V
- Output skew: 115ps (maximum)
- Part-to-part skew: 800ps (maximum), 3.3V/3.3V
- Operating supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V - -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
83940I-01 - Block Diagram
Description
The 83940I-01 is a low skew, 1-to-18 LVPECL-to-LVCMOS/ LVTTL Fanout Buffer. The 83940I-01 has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL or SSTL input levels. The single-ended clock input accepts LVCMOS or LVTTL input levels. The 83940I-01 is characterized at full 3.3V, full 2.5V and mixed 3.3V input and 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 83940I-01 ideal for those clock distribution applications demanding well defined performance and repeatability.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 83940DYI-01LF | Obsolete | N/A | In Stock | TQFP | 32# | Tray | 3 | 0 | 250# | Yes | e3 Sn | -40 to 85°C |
| 83940DYI-01LFT | Obsolete | N/A | In Stock | TQFP | 32# | Reel | 3 | 2000# | 0 | Yes | e3 Sn | -40 to 85°C |
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- Product BriefPDF 378 KB 7WDXRDKU4E7E-6-1169 Aug 14, 2012
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