Features
- Twelve LVCMOS/LVTTL outputs
- CLK input supports the following input types: LVCMOS, LVTTL
- Maximum output frequency: 250MHz
- Output skew: 150ps (maximum)
- Supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
1.8V/1.8V - 0°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
8312 - Block Diagram
Description
The 8312 is a low skew, 1-to-12 LVCMOS/ LVTTL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 8312 single-ended clock input accepts LVCMOS or LVTTL input levels. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines. The 8312 is characterized at full 3.3V, 2.5V, and 1.8V, mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply modes. Guaranteed output and part-to-part skew characteristics along with the 1.8V output capabilities makes the 8312 ideal for high performance, single ended applications that also require a limited output voltage.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 8312AYLF | Obsolete | N/A | Out of Stock | TQFP | 32# | Tray | 3 | 0 | 250# | Yes | e3 Sn | 0 to 70°C |
| 8312AYLFT | Obsolete | N/A | Out of Stock | TQFP | 32# | Reel | 3 | 2000# | 0 | Yes | e3 Sn | 0 to 70°C |
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- Application NotePDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
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