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ForgeFPGA GameBuddy Reference Design

GAME-BUDDY-REF

The ForgeFPGA™ GameBuddy reference design demonstrates the flexibility of Renesas products through an interactive gaming platform featuring:

  • Main Menu and Presentation Mode: Enables QSPI communication with SPI Flash and transitions between configurations using internal reset.
  • Ping-Pong with FPGA: Implements complex finite state machines, display driving, and sound playback.
  • Ping-Pong with another GameBuddy Device: Uses custom protocols and hard LVDS blocks for inter-device communication.
  • Snake Game: Showcases Block RAM (BRAM) keep capability, preserving scores across configurations without Flash memory.
  • USB-SPI Converter: Allows for uploading bitstreams and data into SPI Flash via USB and switching between OTP and SPI Flash configurations.

Features

  • Multi-game demo (Main Menu, Ping-Pong, Snake) showcasing ForgeFPGA capabilities
  • 24-bit RGB display interface with integrated sound playback
  • LVDS-based communication for multiplayer and custom protocols
  • USB-SPI converter for easy bitstream and data upload
  • BRAM data retention for score keeping across configurations

Applications

Home Entertainment, Human Machine Interface (HMI)
Game Buddy Reference Design
Game Buddy Reference Design - Top
Game Buddy Reference Design - Bottom
Game Buddy Reference Design
Game Buddy Reference Design - Top
Game Buddy Reference Design - Bottom

Products in the Design

3D illustration featuring top and bottom views of WLCSP IC chip package with 48 lead count.
ForgeFPGA: Low-Density FPGAs
SLG47921 Active
Low-Power FPGA with 2240 LUTs, 40 GPIOs, LVDS Support, OTP/SPI Config, in Compact Package for Space-Constrained Digital Designs
Datasheet
AT25FF321A
32Mbit, 1.65 V to 3.6 V SPI Serial Flash Memory with Multi-I/O Support
ISL9122A
Ultra-Low IQ Buck-Boost Regulator with Bypass
ISL9205B
Li-ion Battery Charger
SLG46826
GreenPAK Programmable Mixed-Signal IC, VDD Range: 2.3-5.5V, 17 GPIOs, 4 ACMPs, Multi-Time Programmable, I2C, Dual Supply VDD2 Range: 1.71-5.5V
SLG59M1563V
5.5V, 22.5mΩ, 2.5A Load Switch with Power Good Output and Reverse Current Blocking

Application Block Diagrams

The handheld analog gaming console block diagram features a modern ForgeFPGA architecture, flexible power consumption control and low standby power.
Handheld Analog Gaming Console
Analog gaming console with hardware-accurate emulation of classic systems and minimal input latency.

Videos & Training

The ForgeFPGA™ GameBuddy video showcases Renesas FPGA technology through an interactive gaming platform featuring menu navigation, Ping-Pong, and Snake. It also demonstrates advanced capabilities like BRAM score retention and fast bitstream uploads via USB-SPI for flexible configuration.

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