NOTICE - The following device(s) are recommended alternatives:

The MPC9448 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 350 MHz. Each output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of 50Ω terminated transmission lines on the incident edge. Each output is capable of driving either one parallel terminated or two series terminated transmission lines. Two selectable, independent clock inputs are available, providing support of LVCMOS and differential LVPECL clock distribution systems. The MPC9448 CLK_STOP control is synchronous to the falling edge of the input clock. It allows the start and stop of the output clock signal only in a logic low state, thus eliminating potential output runt pulses. Applying the OE control will force the outputs into high-impedance mode. All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports a 2.5 V or 3.3 V power supply and an ambient temperature range of -40°C to +85°C. The MPC9448 is pin and function compatible but performance-enhanced to the MPC948.


  • 12 LVCMOS compatible clock outputs
  • Selectable LVCMOS and differential LVPECL compatible clock inputs
  • Maximum clock frequency of 350 MHz
  • Maximum clock skew of 150 ps
  • Synchronous output stop in logic low state eliminates output runt pulses
  • High-impedance output control
  • 3.3 V or 2.5 V power supply
  • Drives up to 24 series terminated clock lines
  • Ambient temperature range -40°C to +85°C
  • 32-Lead LQFP packaging
  • 32-lead Pb-free package available
  • Supports clock distribution in networking, telecommunication and computing applications
  • Pin and function compatible to MPC948

tuneProduct Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete TQFP 32 C Yes Tray
Obsolete TQFP 32 C Yes Reel


Title language Type Format File Size Date
Datasheets & Errata
star MPC9448 Datasheet Datasheet PDF 285 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1401-02 Alternate Copper Wire Assembly Site Product Change Notice PDF 36 KB
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 363 KB
PDN# : N-12-48R2 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 138 KB
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 209 KB
PDN# : N-12-48 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 93 KB
PCN# : A-0610-02 ASAT China as Alternate Facility for CABGA/CVBGA/FPBGA/TQFP/PQFP Product Change Notice PDF 252 KB
Clock Distribution Overview 日本語 Overview PDF 217 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB


Title language Type Format File Size Date
MPC9448 IBIS Model Model - IBIS ZIP 16 KB

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