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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

2.5V/3.3V,1:4 PECL CLock Driver With 2:1 Input MUX

Package Information

CAD Model:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG16
Lead Count (#):16
Pkg. Dimensions (mm):5.0 x 4.4 x 1.0
Pitch (mm):0.65

Environmental & Export Classifications

Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090
Moisture Sensitivity Level (MSL)1

Product Attributes

Pkg. TypeTSSOP
Lead Count (#)16
Pb (Lead) FreeYes
Carrier TypeReel
Core Voltage (V)2.5V, 3.3V
FunctionBuffer, Multiplexer
Input Freq (MHz)2000
Input TypeHSTL, LVPECL
Inputs (#)2
Length (mm)5
MOQ2500
Moisture Sensitivity Level (MSL)1
Output Banks (#)1
Output Freq Range (MHz)2000
Output Skew (ps)25
Output TypeLVPECL
Output Voltage (V)2.5V, 3.3V
Outputs (#)4
Package Area (mm²)22
Pb Free Categorye3 Sn
Pitch (mm)0.65
Pkg. Dimensions (mm)5.0 x 4.4 x 1.0
Qty. per Carrier (#)0
Qty. per Reel (#)2500
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Temp. Range (°C)0 to 70°C
Thickness (mm)1
Width (mm)4.4

Description

The MC100ES6130 is a 2.5 GHz differential PECL 1:4 fanout buffer. The ES6130 offers a wide operating range of 2.5 V and 3.3 V and also features a 2:1 input MUX which is ideal for redundant clock switchover applications. This device also includes a synchronous enable pin that forces the outputs into a fixed logic state. Enable or disable state is initiated only after the outputs are in a LOW state to eliminate the possibility of a runt clock pulse.