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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

Low Voltage,Low Skew,PCI/PCI-X Clock Generator

Package Information

CAD Model:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PPG64
Lead Count (#):64
Pkg. Dimensions (mm):10.0 x 10.0 x 1.4
Pitch (mm):0.5

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)64
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)160
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Advanced FeaturesFeedback Input
App Jitter CompliancePCI/PCI-X
C-C Jitter Max P-P (ps)70
Core Voltage (V)3.3
Feedback InputYes
Input Freq (MHz)10 - 83.33
Input TypeCrystal, LVCMOS
Inputs (#)2
Length (mm)10
MOQ160
Output Banks (#)5
Output Freq Range (MHz)10 - 166.67
Output Skew (ps)250
Output TypeLVCMOS, LVTTL
Output Voltage (V)3.3
Outputs (#)17
Package Area (mm²)100
Period Jitter Max P-P (ps)17
Pitch (mm)0.5
Pkg. Dimensions (mm)10.0 x 10.0 x 1.4
Pkg. TypeTQFP
Product CategoryZero Delay Buffers
Prog. ClockNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1.4
Width (mm)10

Description

The 8761I is a low voltage, low skew PCI / PCI-X clock generator. The 8761I has a selectable REF_CLK or crystal input. The REF_CLK input accepts LVCMOS or LVTTL input levels. The 8761I has a fully integrated PLL along with frequency configurable clock and feedback outputs for multiplying and regenerating clocks with "zero delay". Using a 20MHz or 25MHz crystal or a 33.333MHz or 66.666MHz reference frequency, the 8761I will generate output frequencies of 33.333MHz, 66.666MHz, 100MHz and 133.333MHz simultaneously. The low impedance LVCMOS/LVTTL outputs of the 8761I are designed to drive 50Ω series or parallel terminated transmission lines.