Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG20 |
| Lead Count (#): | 20 |
| Pkg. Dimensions (mm): | 6.5 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 20 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 74 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Assembly Location | TAIWAN |
| Wafer Fab Location | AUSTRIA |
| Additive Phase Jitter Typ RMS (fs) | 73 |
| Additive Phase Jitter Typ RMS (ps) | 0.073 |
| Core Voltage (V) | 2.5V, 3.3V |
| Function | Multiplexer |
| Input Freq (MHz) | 3000 |
| Input Type | CML, LVDS, LVPECL, SSTL |
| Inputs (#) | 4 |
| Length (mm) | 6.5 |
| MOQ | 148 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 3000 |
| Output Type | LVPECL |
| Output Voltage (V) | 2.5V, 3.3V |
| Outputs (#) | 1 |
| Package Area (mm²) | 28.6 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 6.5 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Product Category | Clock Multiplexers |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
The 853S057I is a 4:1 Differential-to-3.3V or 2.5V LVPECL/ECL Clock/Data Multiplexer which can operate up to 3GHz and is a member of the HiPerClockS ™ family of High Performance Clock Solutions from IDT. The 853S057I has 4 differential selectable clock input pairs. The CLK/nCLK input pairs can accept LVPECL, LVDS, CML or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The multiplexer select control inputs have ECL/LVPECL interface levels. The select pins have internal pulldown resistors.