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Renesas Electronics Corporation
FemtoClock™ NG Crystal-to-LVDS/HCSL Clock Synthesizer

Package Information

CAD Model:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG32
Lead Count (#):32
Pkg. Dimensions (mm):5.0 x 5.0 x 0.9
Pitch (mm):0.5

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)32
Carrier TypeReel
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)2500
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
100M Non-SSC Outputs4
100M SSC Outputs0
25M Outputs0
Advanced FeaturesProgrammable Clock, 100M output(s), 125M output(s), 156.25M output(s), 250M output(s)
App Jitter ComplianceXAUI, RXAUI
Chipset ManufacturerCavium
Clock Spec.Cavium: Period Jitter < 44 ps
Core Voltage (V)2.5V, 3.3V
Diff. Termination Resistors10
Feedback InputNo
FunctionGenerator
Input Freq (MHz)25 - 25
Input TypeCrystal, LVCMOS
Inputs (#)2
Length (mm)5
MOQ2500
Output Banks (#)1
Output Freq Range (MHz)100 - 100, 125 - 125, 156.25 - 156.25, 250 - 250
Output Skew (ps)2700
Output TypeLVDS, HCSL
Output Voltage (V)2.5V, 3.3V
Outputs (#)4
PCI 33.33M Outputs (#)0
Package Area (mm²)25
Phase Jitter Typ RMS (ps)0.27
Pitch (mm)0.5
Pkg. Dimensions (mm)5.0 x 5.0 x 0.9
Pkg. TypeVFQFPN
Power Consumption Typ (mW)834
Product CategoryFemtoClock, Ultra-Low Jitter Clocks (<300 fs RMS), PCI Express Clocks, Processor Clock Generators
Prog. ClockNo
PublishedNo
Reel Size (in)13
Reference OutputNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumNo
Supply Voltage (V)2.5 - 3.3
Tape & ReelYes
Thickness (mm)0.9
Width (mm)5
Xtal Freq (MHz)25 - 25

Description

The 841N254I is a 4-output clock synthesizer designed for S-RIO 1.3 and 2.0 reference clock applications. The device generates four copies of a selectable 250MHz, 156.25MHz, 125MHz or 100MHz clock signal with excellent phase jitter performance. The four outputs are organized in two banks of two LVDS and two HCSL outputs. The device uses Renesas' fourth generation FemtoClock™ NG technology for an optimum of high clock frequency and low phase noise performance, combined with a low power consumption and high power supply noise rejection. The synthesized clock frequency and the phase-noise performance are optimized for driving RIO 1.3 and 2.0 SerDes reference clocks. The device supports 3.3V and 2.5V voltage supplies and is packaged in a small 32-lead VFQFN package. The extended temperature range supports wireless infrastructure, telecommunication and networking end equipment requirements.