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Features

  • Logic and Mixed Signal Circuits
  • Highly Versatile Macrocells
  • Read Back Protection (Read Lock)
  • 1.8V (±5%) to 5V (±10%) Supply
  • Operating Temperature Range -40°C to 85°C
  • Soft-Start 1.25A P-FET Power Switch
  • Pb-Free/Halogen-Free/RoHS-compliant
  • Macrocells Overview
    • Two Analog Comparators (ACMP)
    • Voltage References (Vref)
    • Four Combinatorial Look-Up Tables (LUTs)
      • Two 2-bit LUTs
      • Two 3-bit LUTs
    • Seven Combination Function Macrocell
      • Two Selectable DFF/Latch or 2-bit LUTs
      • Two Selectable DFF/Latch or 3-bit LUTs
      • One Selectable Pipe Delay or 3-bit LUT
        • Pipe Delay - 8 Stage/2 Output
      • One Selectable Counter/Delay or 4-bit LUT
      • One Programmable Delay/Deglitch Filter
    • Three Counter/Delay Generators (CNT/DLY)
      • Three 8-bit Counter/Delays with External Clock/Reset
    • Four D Flip-Flop/Latches (DFF) (Part of Combination Function Macrocell)
    • Pipe Delay - 8 Stage/2 Output (Part of Combination Function Macrocell)
    • One Bandgap
    • Power-On Reset (POR)
    • Trimmed RC Oscillator (RC OSC)
    • Soft-Start P-FET Power Switch
      • Power Switch IDS: 1.25A
      • Slew Rate Control
      • VIN: 1.5V to 5.5V
      • Low RDSON
        • 28.5mΩ at 5.0V
        • 36.4mΩ at 3.3V
        • 44.3mΩ at 2.5V
        • 60.8mΩ at 1.8V
        • 77.6mΩ at 1.5V

Description

The SLG46116 provides a small, low-power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one-time programmable (OTP) non-volatile memory (NVM) to configure the interconnect logic, the I/O pins, and the macrocells of the SLG46116. This highly versatile device allows for a wide variety of mixed-signal functions to be designed within a very small, low-power single integrated circuit.

Parameters

AttributesValue
Special FeaturesP-FET (1.25A w/o Discharge Soft-start)
GPIOs (#)7
Nominal VDD1.71 - 5.5
ACMP Channels (#)2
CNT/DLY (Max) (#)4
LUTs (Max) (#)10
D Flip-flops (DFFs) (#)4
Pipe Delay8-stage
# of Programable Delays (#)1
Oscillator TypeRC OSC
Memory TypeOTP
Temp. Range (°C)-40 to +85°C

Package Options

Pkg. TypePkg. Dimensions (mm)Lead Count (#)Pitch (mm)
STQFN1.6 x 2.5140.4

Applications

  • Power sequencing with complex analog control
  • Power plane component size reduction project
  • LED drivers
  • Haptic motor drivers
  • System RESET with power switch
Part NumberStatusSamplesStockPackageBudgetary Price (USD)Lead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Pb (Lead) FreeTemp. Range (°C)Country of AssemblyCountry of Wafer Fabrication
SLG46116VActiveAvailableIn StockSTQFN1ku | $0.33714#Tape & Reel1Yes-40 to +85°CCHINA, TAIWANTAIWAN

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Support Communities

  1. SLG46116 questions

    Hi, I have two questions about the SLG46116: - What pins are used for programming? I can find this in the datasheet for other greenpak devices but not in the SLG46116 or SLG46117 datasheets. - What is the safe operating area of the power FET? I'd like to specify a PTC ...

    Mar 29, 2021
  2. P-FET Current Output

    Hello! I am trying to implement an SLG46116 chip into a sensing system and I am having trouble understanding the current flow through the PFET switch. In the spec sheet (https://www.dialog-semiconductor.com/sites/default/files/slg46116r109_1…) it includes information regarding ...

    Feb 12, 2018
  3. GreenPAK GPIO during power-up

    ... control. It seems like the "output state unpredictable" does not guarantee this - is that the case? Are there any possible mitigations? Also, some datasheets (like SLG46116) don't include an "unpredictable" area. Are those parts guaranteed to hold their outputs in tri-state throughout power-up or is this an ...

    May 29, 2021
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