Overview

Description

The SLG46531 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macro cells of the SLG46531. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit.

Features

  • Logic & Mixed Signal Circuits
  • Highly Versatile Macro Cells
  • Read Back Protection (Read Lock)
  • 1.8 V (±5%) to 5 V (±10%) Supply
  • Operating Temperature Range: -40°C to 85°C
  • RoHS Compliant / Halogen-Free

Macrocells Overview

  • Four Analog Comparators (ACMP);
  • Two Voltage References (Vref);
  • Seventeen Combination Function Macrocells:
    • Three Selectable DFF/Latch or 2-bit LUTs;
    • One Selectable Continuous DFF/Latch or 3-bit LUT;
    • Four Selectable DFF/Latch or 3-bit LUTs;
    • One Selectable Pipe Delay or 3-bit LUT;
    • One Selectable Programmable Function Generator or 2-bit LUT;
    • Five 8-bit delays/counters or 3-bit LUTs;
    • Two 16-bit delays/counters or 4-bit LUTs;
  • Asynchronous State Machine:
    • Eight States;
    • Flexible input logic from state transitions;
  • Serial Communications:
    • I2C Protocol compliant;
  • Pipe Delay - 16 stage/3 output (Part of Combination Function Macrocell);
  • Programmable Delay;
  • Additional Logic Functions - 2 Deglitch Filters with Edge Detectors;
  • Two Oscillators (OSC):
    • Configurable 25 kHz/2 MHz;
    • 25MHz Ring Oscillator;
  • Crystal Oscillator;
  • Eight Byte RAM + OTP User Memory:
    • RAM Memory space that is readable and writeable via I2C;
    • User defined initial values transferred from OTP.

Applications

  • Personal Computers and Servers
  • PC Peripherals
  • Consumer Electronics
  • Data Communications Equipment
  • Handheld and Portable Electronics

Documentation

Title Type Date
PDF2.29 MB
Datasheet
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Application Note
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Device Errata
White Paper
ZIP452 KB
White Paper

Design & Development

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Models