Zone/Domain and Vehicle Motion Microcontroller
Overview
The RH850/U2B next-generation 28nm cross-domain automotive control microcontroller series realizes up to 8 cores x 400MHz incl. Virtualization Support and Quality-of-Service (QoS). The RH850/U2B is equipped with the latest HW-support technologies to realize the integration of multiple ASIL-D SW-partitions into one ECU while ensuring Freedom-From-Interference between the concurrently running applications to meet the ISO26262 ASIL-D standard.
To enhance the performance level for real-time control the RH850/U2B will be partly equipped with the ASIL-D capable DR1000C, a RISC-V based parallel coprocessor IP with vector extension. The DR1000C is ideal for offloading heavy-load arithmetic processing e.g. to cover upcoming requirements, like EU7 exhaust emission legislation in Europe.
Motor/generator-control is the key technology for the electrification trend of all vehicle types. The integrated and comprehensive Renesas solution for traction inverter control incorporates a stand-alone high-performance motor-control accelerator IP (EMU3S) that works in flexible conjunction with multiple dedicated motor-control timer structures like GTM v4.1 and TSG3. As a unique feature, the embedded motor position sensor interface RDC3X (covering resolvers as well as inductive position sensors) provides the option to achieve significant BOM-cost reduction because the usually required external RDC chipset may be omitted.
RH850/U2B Block Diagram
- Key features:
- 400MHz speed for up to 8+4 (LockStep) RH850 G4MH CPUs
- Top-level ratio of performance vs. power consumption
- Up to 32MB Flash
- Up to 5.1MB RAM
- RISC-V based MIMD high-performance embedded vector processor
- Embedded EMU3S (Embedded motor control unit), RDC3X (Position sensor interface) and TSG3 (motor timer) for field-oriented traction motor (inverter) control
- Up to 5 x ADC (12-bit), with a maximum of 128 channels, including 4+4+2+2 Track and Hold inputs
- Up to 14 x DS-ADCs with a Digital Filter Engine
- GTM v4.1 vehicle motion timer
- High temperature support: up to Tj = 160°C
- State of the Art Interfaces
- Up to 2x Gigabit Ethernet TSN including a switch function (RSwitch)
- CAN-FD, SPI, RHSB (MSC), RHSIF, SENT, LIN, UART, I2C, PSI5,
- SFMA (Serial flash memory interface)
- eMMC
- Support for FuSa and Security
- Security module with EVITA Full support
- ISO26262 ASIL-D
- Extensive Eco-System supporting the latest standards concerning Tool, HW and SW areas
- Zone control ECU
- Domain control ECU
- Communication gateway
- Vehicle motion applications
- xEV, ICE, TCU
Design & Development
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
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Additional Details
To achieve freedom from interference between integrated applications of a zone control ECU, several HW measures are implemented:
- Hypervisor HW-assist function to enable a HV-OS in a high-performance manner (fast context switching, HV interrupt concept)
- Quality of Service (QoS): Latency monitor and regulation function for all bus masters to ensure minimum bandwidth.
- Memory Protection Unit (MPU): Fine granular separation of bus master access to memory and other resources
- Guard concept: Highly flexible slave protection system for peripheral memory and peripheral modules
- Safety: Multiple individual error output signals to ensure individual treatment on a SW-partition level
- Security: multiple instances of AES128 lockstep modules for conflict-free and deterministic secure and safe communication
- No-wait OTA: Background operation on flash banks to ensure independent update of individual SW-partitions
Parallel co-processor DR1000C (data flow processor):
The DR1000C is licensed from NSITEXE, Inc. of Japan. NSITEXE is an IP vendor, established in 2017 as a spin-off from DENSO Corp., specializing in the development of advanced processors.
The DR1000C is required by automotive microcontrollers which are targeted for safety critical systems. Up to 16 hardware threads can efficiently utilize the vector processor, thereby achieving extremely high-power performance.