Overview

This device contains 8 master-slave flip-flops with a common clock and common clear. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the clock input. The clear input when low, sets all outputs to a low state.

  • High-Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF)
  • High Output Current: Fanout of 10 LSTTL Loads
  • Wide Operating Voltage: VCC = 2 to 6 V
  • Low Input Current: 1 µA max
  • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Explore ECAD Models
Diagram of ECAD Models

Product Options

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    Part Number
    HD74HC273RP
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