The ClockMatrix family of devices are high-performance, precision timing solutions designed to simplify clock designs for applications with up to 100Gbps interface speeds. 

They can be used anywhere in a system to perform critical timing functions, such as clock generation, frequency translation, jitter attenuation and phase alignment. A range of devices in the family support BBU, OTN, SyncE, synthesizer and jitter attenuator applications with several density options for each. To easily implement synchronization in IEEE 1588 systems, Renesas offers PTP clock manager software for free under license.

Key features include:

  • Flexibility – PLL channels are individually configurable as a synthesizer, jitter attenuator, or DCO
  • Integration – up to 8 DPLLs and 12 outputs in a single package
  • Performance – RMS jitter as low as 100 fs (typ)
  • Standards compliant – IEEE 1588, OTN, and SyncE
  • Programmable – I2C, SPI or OTP
  • Right size for the job – Package options from 144-BGA down to 48-QFN


Title language Type Format File Size Date
Datasheets & Errata
8A3xxxx Firmware Version v4.8.7 Errata Notice Device Errata PDF 38 KB
User Guides & Manuals
ClockMatrix GUI Step-by-Step User Guide Guide PDF 10.53 MB
8A3xxxx Family Programming Guide (v4.8.7) Guide PDF 2.35 MB
8A3xxxx Family Programming Guide (v4.9) Guide PDF 2.39 MB
8A3xxxx Firmware Version v4.8.7 Release Notes Guide PDF 143 KB
8A3xxxx Family Programming Guide (v4.8) Guide PDF 2.35 MB
Changing 8A3xxxx Serial Port after Start-Up User Manual Manual - Hardware PDF 486 KB
Application Notes & White Papers
XO_DPLL Monitoring for ClockMatrix FW5.2 Application Note PDF 542 KB
ClockMatrix Combo Mode Filter Application Note PDF 692 KB
AN-1010 ClockMatrix Time-to-Digital Converter Application Note PDF 1.93 MB
Using a Frame or Sync Pulse Input for Clock Alignment Application Note PDF 2.13 MB
ClockMatrix™ - Channel Control for PTP with the Time of Day Counter Application Note PDF 393 KB
ClockMatrix Oscillator Compensation Application Note PDF 231 KB
Programming the 24FC1025 EEPROM with the Total Phase EEPROM Board Application Note PDF 552 KB
Optimizing Holdover Performance Application Note PDF 471 KB
Programming the 24FC1025 EEPROM with the FTDI C232HM Cable Application Note PDF 385 KB
SPI Connections to ClockMatrix Evaluation Board Application Note PDF 272 KB
ClockMatrix Delta Configuration Updates Application Note PDF 406 KB
- ClockMatrix Firmware (v4.8.7) Trigger Registers Software & Tools - Other ZIP 76 KB
ClockMatrix Trigger Registers Application Note PDF 304 KB
8A3xxxx: Using an External Trigger for Loading/Latching ToD Application Note PDF 839 KB
AN-807 Recommended Crystal Oscillators for Network Synchronization Application Note PDF 148 KB
Mapping Clock Device Pins to Clock Numbers in the 8A34001 Application Note PDF 390 KB
Translating Non-Integer Frequencies with ClockMatrix Application Note PDF 880 KB
Auto-Alignment of Outputs Application Note PDF 584 KB
Locking a ClockMatrix DPLL to Internal Feedback Application Note PDF 162 KB
ClockMatrix EEPROM Programming Instructions Application Note PDF 550 KB
ClockMatrix Firmware Update through Serial Port and EEPROM v1.0 Application Note PDF 739 KB
AN-1033 Delay Variation Measurement and Compensation Application Note PDF 633 KB
AN-1031 Time Alignment Background in Wireless Infrastructure Application Note PDF 479 KB
AN-1032 Time-of-Day Within an Ideal Chassis-Based System Application Note PDF 442 KB
AN-1034 Minimizing Backplane Signal Usage Application Note PDF 566 KB
AN-1030 CM Input/Input-to-Output/Output Phase Adjustment Application Note PDF 976 KB
AN-1020 ClockMatrix on nCXO Redundancy Application Note PDF 659 KB
8A3xxxx Firmware Version v4.8.8 Release Notes Release Note PDF 103 KB
8A3xxxx Firmware Version v5.2.3 Release Notes Release Note PDF 94 KB
ClockMatrix 48-QFN Evaluation Board Schematic Schematic PDF 199 KB
8A3x0xx Schematic Checklist (v1.23) Other XLSX 318 KB
ClockMatrix Family Overview Overview PDF 285 KB
ClockMatrix 72-QFN (12 Output) Reference Schematic Schematic PDF 98 KB
ClockMatrix 144-BGA Devices Evaluation Board Schematic v1.1 Schematic PDF 288 KB
ClockMatrix 72-QFN (8 Output) Evaluation Board Schematic Schematic PDF 206 KB


Title language Type Format File Size Date
Timing Commander Personality File for ClockMatrix 8A34001 (v10.0.1, FWv4.8.7) Software & Tools - Other ZIP 48.70 MB
ClockMatrix Firmware (v4.9.1) Async Clock over PWM Software & Tools - Software ZIP 615 KB
ClockMatrix Firmware (v4.8.7) Trigger Registers, v1.1 Software & Tools - Other ZIP 73 KB
FW4.8.7 EEPROM Images and Serial Port Update Files Software & Tools - Other ZIP 1.73 MB
8A3xxxx: How to Use SPI to Access ClockMatrix Registers Software & Tools - Other PDF 488 KB
8A34xxx I2C-SPI Write-Read Example User Reference Software & Tools - Other PDF 222 KB
EEPROM_Image_PR4.7_Part=24xx1024_Address=0x50-0x51 Software & Tools - Other ZIP 177 KB
EEPROM_Image_PR4.7_Part=24xx1025_Address=0x50-0x54 Software & Tools - Other ZIP 177 KB
8A34003 BSDL Model Model - BSDL ZIP 2 KB
8A340x1 BSDL Model Model - BSDL BSDL 15 KB
8A340x2 BSDL Model Model - BSDL BSDL 12 KB
ClockMatrix BGA-144 2-Resistor Thermal Model with 1W Power Model - Thermal PDML 2 KB
ClockMatrix BGA-144 Delphi Thermal Model with 1W Power Model - Thermal PDML 3 KB