The 9FGL0441/51 devices are 4-output  3.3V PCIe Gen1–5 clock generators. Each output has a dedicated OE# pin supporting PCIe CLKREQ# functionality. Two different spread spectrum levels, in addition to spread off, are supported. The 9FGL0441/51 supports PCIe Gen1–5 Common Clocked architectures (CC), PCIe Separate Reference no-Spread (SRNS) and Separate Reference Independent Spread (SRIS) clocking architectures.


  • PCIe Gen1–5 CC-compliant
  • Supports PCIe SRIS and SRNS clocking
  • Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output
  • Pin-selectable SRnS 0%, CC 0% and CC/SRIS -0.5% spread
  • SMBus-selectable CC/SRIS -0.25% spread
  • One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support
  • Easy AC-coupling to other logic families, see application note AN-891.
  • Space saving 5 × 5 mm 32-VFQFPN


Document title Document type
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PDF 545 KB Datasheet
PDF 91 KB Application Note
PDF 1.99 MB Application Note
PDF 255 KB Application Note
PDF 480 KB Application Note
PDF 235 KB Application Note
PDF 1.90 MB Application Note
PDF 495 KB Application Note
PDF 442 KB Application Note
PDF 233 KB Application Note
PDF 160 KB Application Note
PDF 120 KB Application Note
PDF 565 KB Application Note
PDF 136 KB Application Note
PDF 483 KB Datasheet
PDF 321 KB 简体中文 Guide
PDF 2.40 MB Overview
PDF 1.83 MB Overview
PDF 171 KB Product Advisory
PDF 1.26 MB Product Change Notice
PDF 734 KB Product Change Notice
PDF 120 KB Product Change Notice
PDF 728 KB Product Change Notice
PDF 127 KB Product Change Notice
PDF 983 KB Product Change Notice
PDF 583 KB Product Change Notice
PDF 23 KB Product Change Notice
PDF 596 KB Product Change Notice
PDF 544 KB Product Change Notice
PDF 34 KB Schematic
30 items

Design & Development



Title Type Type Date Date
ZIP 49 KB Model - IBIS
ZIP 89 KB Model - IBIS
2 items