Automotive information devices today integrate IT such as cloud computing with smartphones, and functions for safety such as around-view monitoring with onboard camera to offer drivers higher security, safety, and conformity. As integrated dashboard systems improve and become more and complex, auto makers require higher performance, function, and product quality. This results in higher difficulty in hardware/software development, rising development cost, longer development period, and difficulty in maintaining product quality.

Renesas has introduced a new product, the R-Car M2, designed to address growing integrated dashboard and information device market demands, as well as a new low-cost development tool supporting this new product. In addition, the R-Car Consortium is also expanding with many partners around the world, providing you with more choices for supporting product development and making it easier to resolve development issues.


  • Three times the CPU performance, six times the graphics performance, and three times the memory bus performance of the previous same-class product, the R-Car M1, and even higher performance characteristics than the existing high-end product, the R-Car H1
  • Optimized functions to mid-range automotive information devices to realize software compatibility in the product family
  • Offers low-cost software development board to expand development partners




  • Automotive HMI
  • Automotive infotainment
  • Integrated dashboard


Item R-Car M2 Specifications
Product No R8A7791
Power supply voltage 3.3/1.8 V (IO), 1.5/1.35 V (DDR3), 1.03 V (Core)
CPU core Arm® Cortex®-A15
SH-4A core
(device option)
Maximum operating frequency 1.5 GHz 780 MHz
Processing performance 10500 DMIPS 1720 DMIPS
Cache memory L1 Instruction cache: 32 KB
L1 Operand cache:32 KB
L2 Cache: 2 MB
Instruction cache: 32 KB
Operand cache: 32 KB
External memory DDR3-SDRAM
Maximum operating frequency: 800 MHz
Data bus width: 32 bits × 2 ch (6.4 GB/s × 2)
Expansion bus Flash ROM and SRAM
Data bus width: 8 or 16 bits
PCI Express2.0 (1lane)
Graphics PowerVR SGX544MP2 (3D)
Renesas graphics processor (2D)
Video Display Out × 2 ch (1 ch: LVDS, 1 ch: RGB888)
Video Input × 3 ch
Video codec module (H.264/AVC, MPEG-2/4, VC-1)
IP conversion module
JPEG accelerator
TS Interface × 1 ch
Video image processing (color conversion, image expansion, reduction, filter processing)
Distortion compensation module (image renderer) × 1 ch
Audio Audio DSP
Sampling rate converter × 10 ch
Serial sound interface × 10 ch
Storage interfaces USB 3.0 Host interface × 1 port (wPHY)
USB 2.0 Host interface × 2 port (wPHY)
SD Host interface × 3 ch (SDXC, UHS-I)
Multimedia card interface × 1 ch
Serial ATA interface × 2 ch
In car network and
automotive peripherals
Media local bus (MLB) Interface × 1 ch (6 pin / 3 pin interface selectable)
CAN Interface × 2 ch
IEBus Interface
GPS baseband module (Galileo, GLONASS) (device option)
Ethernet controller AVB (IEEE802.1BA, 802.1AS, 802.1Qav and IEEE1722, GMII/MII, without PHY)
Security Crypto engine (AES, DES, Hash, RSA)
Other peripherals DMA controller
LBSC DMAC : 3 ch / SYS-DMAC : 30 ch / RT-DMAC : 3ch /
Audio-DMAC : 26 ch / Audio (peripheral)-DMAC : 29 ch
32bit timer × 12 ch
PWM timer × 7 ch
I 2 C bus interface × 9 ch
Serial communication interface (SCIF) × 18 ch
Quad serial peripheral interface (QSPI) × 1 ch (for boot)
Clock-synchronized serial interface (MSIOF) × 3 ch (SPI/IIS)
Ethernet AVB controller (IEEE802.1BA/802.1AS/802.1Qav/IEEE1722, GMII/MII, without PHY)
Ethernet controller (IEEE802.3u, RMII, without PHY)
Interrupt controller (INTC)
Clock generator (CPG) with built-in PLL
On chip debugger interface
Low power mode Dynamic Power Shutdown (CPU core, 3D, IMP)
AVS and DVFS function
DDR-SDRAM power supply backup mode
Package 831 pin Flip Chip BGA (27 mm × 27 mm)

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Other product and service names that appear in this press release are trademarks or registered trademarks of their respective owners.