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特長

  • 9 outputs LVCMOS PLL clock generator
  • 25ohm240 MHz output frequency range
  • Fully integrated PLL
  • Compatible to various microprocessors such as PowerQuicc II
  • Supports networking, telecommunications and computer applications
  • Configurable outputs: divide-by-2, 4 and 8 of VCO frequency
  • LVPECL and LVCMOS compatible inputs
  • External feedback enables zero-delay configurations
  • Output enable/disable and static test mode (PLL enable/disable)
  • Low skew characteristics: maximum 150 ps output-to-output
  • Cycle-to-cycle jitter max. 22 ps RMS
  • 32-lead LQFP package
  • 32-lead Pb-free Package Available
  • Ambient Temperature Range 0°C to +70°C
  • Pin & Function Compatible with the MPC951

説明

The MPC93R51 is a 3.3 V compatible, PLL based clock generator targeted for high performance clock distribution systems. With output frequencies of up to 240 MHz and a maximum output skew of 150 ps, the MPC93R51 is an ideal solution for the most demanding clock tree designs. The device offers 9 low skew clock outputs, each is configurable to support the clocking needs of the various high-performance microprocessors including the PowerQuicc II integrated communication microprocessor. The devices employ a fully differential PLL design to minimize cycle-to-cycle and long-term jitter.

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