メインコンテンツに移動
3.3V 256K x 36 ZBT Synchronous 3.3V I/O Flow-Through SRAM

パッケージ情報

Lead Count (#) 100
Pkg. Code PKG100
Pitch (mm) 0.65
Pkg. Type TQFP
Pkg. Dimensions (mm) 20.0 x 14.0 x 1.4

環境及び輸出分類情報

Pb (Lead) Free Yes
Moisture Sensitivity Level (MSL) 3
ECCN (US) EAR99
HTS (US) 8542.32.0041

製品スペック

Lead Count (#) 100
Pb (Lead) Free Yes
Carrier Type Tray
Moisture Sensitivity Level (MSL) 3
Country of Assembly Taiwan
Country of Wafer Fabrication Taiwan, United States
Price (USD) 24.3613
Architecture ZBT
Bus Width (bits) 36
Core Voltage (V) 3.3
Cycle Time (ns) 80
Density (Kb) 9216
I/O Voltage (V) 2.5 - 2.5
Length (mm) 20.0
MOQ 216
Organization 256K x 36
Output Type Flowthrough
Package Area (mm²) 280.0
Pb Free Category e3 Sn
Pitch (mm) 0.65
Pkg. Dimensions (mm) 20.0 x 14.0 x 1.4
Pkg. Type TQFP
Qty. per Carrier (#) 72
Qty. per Reel (#) 0
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Temp. Range (°C) -40 to 85°C
Thickness (mm) 1.4
Width (mm) 14.0

説明

The 71V65703 3.3V CMOS SRAM, organized as 256K x 36, is designed to eliminate dead bus cycles when turning the bus around between reads and writes or writes and reads. Thus it has been given the name ZBT™, or Zero Bus Turnaround. The 71V65703 contains address, data-in, and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.