Overview

Description

These device are positive edge triggered flip-flops. The difference between HD74HCT374 and HD74HCT534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.

Features

  • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
  • High-Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF)
  • High Output Current: Fanout of 15 LSTTL Loads
  • Wide Operating Voltage: VCC = 4.5 to 5.5 V
  • Low Input Current: 1 µA max
  • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)

Documentation

Document title Document type
Type
Date Date
PDF 295 KB Datasheet
PDF 5.23 MB Brochure
PDF 1.32 MB Brochure
PDF 130 KB 日本語 Datasheet
PDF 4.86 MB 日本語 Product Change Notice
PDF 3.74 MB 日本語 Product Change Notice
PDF 1.46 MB 日本語 Product Change Notice
7 items

Design & Development

Models