H8S/2168

FAQs

1. (H8S/2668) How does the H8 instruction prefetch provide a performance increase?

   By pre-fetching the first word of the next instruction during the execution stage of the current instruction, bus idle times can be kept to a minimum, thus increasing performance.

   Mar 23, 2009
2. Is the memory configuration of the H8S family big-endian or little-endian?

   The memory configuration of the H8S family is big-endian.

   Jan 18, 2008
3. Can you name 3 features of H8S that improved power consumption over 300H

   "Event driven logic. Local Clock Pulse Generators at the peripherals so that only one clock phase is distributed around the device. The two phase clock is generated at the peripheral. Split BUS. For the majority of the time the CPU uses a lowcapacitance bus to access ROM and RAM ...

   Mar 23, 2009