Overview
Description
The ADC1212D125HN is a dual channel 12-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1212D125HN is accurate enough to guarantee zero missing codes over the entire operating range.
Features
- Clock input divider by 2 for less jitter contribution
- CMOS or LVDS DDR digital outputs
- Duty cycle stabilizer
- Input bandwidth, 600 MHz
- Offset binary, 2's complement, gray code
- Power dissipation, 775 mW at 80 Msps
- Power-down and Sleep modes
- Sample rate up to 125 Msps
- Single 3 V supply
- SPI
Comparison
Applications
Documentation
Featured Documentation
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| Type | Title | Date |
| Datasheet | PDF 662 KB | |
| End Of Life Notice | PDF 538 KB | |
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Design & Development
Boards & Kits
Demonstration
ADC1212D125F1
Obsolete
ADC1212D125F1 demo board; CMOS version; SPI and CMOS buffer on board
IDT's dual-channel ADC demoboard is suitable for dynamic performance evaluations from low to high IF configuration with LVCMOS output variants. A data-acquisition board can be used during design and prototype to analyze ADC performance.
Recommended Documents:
Demonstration
ADC1212D125F2
Obsolete
ADC1212D125F2 demo board; LVDS/DDR version
IDT's dual-channel ADC demoboard is suitable for dynamic performance evaluations from low to high IF configuration with LVDS/DDR output variants. A data-acquisition board can be used during design and prototype to analyze ADC performance.
Recommended Documents:
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
Product Options
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