Package Information
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG40 |
| Lead Count (#): | 40 |
| Pkg. Dimensions (mm): | 6.0 x 6.0 x 0.9 |
| Pitch (mm): | 0.5 |
Environmental & Export Classifications
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
Product Attributes
| Lead Count (#) | 40 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 5000 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Advanced Features | Programmable Clock, Spread Spectrum |
| C-C Jitter Max P-P (ps) | 40 |
| Core Voltage (V) | 2.5, 3.3 |
| Family Name | FemtoClock NG |
| Feedback Input | No |
| Input Freq (MHz) | 5 - 800 |
| Input Type | HCSL, LVDS, LVPECL |
| Inputs (#) | 1 |
| Length (mm) | 6.0 |
| MOQ | 5000 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 15.5 - 650, 975 - 1300 |
| Output Signaling | LVPECL, LVDS |
| Output Skew (ps) | 40 |
| Output Type | LVPECL, LVDS |
| Output Voltage (V) | 3.3, 2.5 |
| Outputs (#) | 8 |
| Package Area (mm²) | 36.0 |
| Period Jitter Typ P-P (ps) | 0.282 |
| Phase Jitter Max RMS (ps) | 0.405 |
| Phase Jitter Typ RMS (fs) | 323.000 |
| Phase Jitter Typ RMS (ps) | 0.323 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 6.0 x 6.0 x 0.9 |
| Pkg. Type | VFQFPN |
| Prog. Clock | Yes |
| Prog. Interface | I2C |
| Published | No |
| Reel Size (in) | 13 |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 2.5 - 2.5, 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 0.9 |
| VCO Max Freq (MHz) | 2500 |
| VCO Min Freq (MHz) | 1910 |
| Width (mm) | 6.0 |
| Xtal Freq (MHz) | 10 - 40 |
| Xtal Inputs (#) | 1 |
Resources for 8T49N524I
Description
The 8T49N524I is an eight output programmable any-rate dual clock generator with selectable LVDS or LVPECL outputs. Both clock generators use Fractional Output Dividers to be able to generate output frequencies that are independent of each other and independent of the input frequency. Output frequencies for both clock generators are generated from a single crystal or reference clock. Clock Generator A supports three different factory-programmed default frequencies that can be selected from using only the FSEL control pins. Alternatively, any desired output frequency can be programmed over the I2C serial port. The chosen output frequency is then driven out the QA0 to QA3 outputs.
Clock Generator B supports a single factory-programmed default frequency. It can also be programmed for any output frequency via the serial port. The output frequency is driven out the QB0 to QB3 outputs. Please consult Renesas for programming software that can be used to determine the required settings for any desired configuration.
Excellent phase noise performance is achieved with Renesas' fourth Generation FemtoClock® NG PLL technology, which delivers sub-0.5ps RMS phase jitter in the integer divide mode.