CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. Q outputs are available from each of the four stages on both registers. All register stages are D type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one CD4015BMS package, or to more than 8 stages using additional CD4015BMS's is possible. The CD4015BMS is supplied in these 16 lead outline packages: Braze Seal DIP H4X Frit Seal DIP H1F Ceramic Flatpack H6W

Features

  • High voltage type (20V rating)
  • Medium speed operation 12MHz (typ.) clock rate at VDD - VSS = 10V
  • Fully static operation
  • 8 master-slave flip-flops plus input and output buffering
  • 100% tested for quiescent current at 20V
  • 5V, 10V and 15V parametric ratings
  • Standardized symmetrical output characteristics
  • Maximum input current of 1µA at 18V over full package - temperature range; 100nA at 18V and 25 °C
  • Noise margin (full package - temperature range) = 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V
  • Meets all requirements of JEDEC tentative standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

Applications

  • Serial-input/parallel-output data queueing
  • Serial to parallel data conversion
  • General-purpose register

Product Options

Part Number Part Status Pkg. Type Carrier Type DLA SMD Buy Sample
Active SBDIP Tube 5962R9662401VEC
Availability
Active CFP Tray 5962R9662401VXC
Availability
Active CFP Tray 5962R9662402VXC
Availability

Documentation & Downloads

Title language Type Format File Size Date
Datasheets & Errata
CD4015BMS Datasheet Datasheet PDF 415 KB
Application Notes & White Papers
Wafer by Wafer Low Dose Rate Acceptance White Paper White Paper PDF 533 KB
AN9867: End of Life Derating: A Necessity or Overkill Application Note PDF 338 KB
PCNs & PDNs
PCN10123 - Alternate Die Attach Material for Assembly of Intersil Hermetic Packaged Products - Intersil Palm Bay, FL. (ISP) Product Change Notice PDF 230 KB
Other
Intersil Space Products Brochure Brochure PDF 3.14 MB
PIN19011 - Price Increase for the Listed Renesas Electronics America (REA) Radiation Hardened Space Products Price Increase Notice PDF 360 KB
Standard Microcircuit Drawing 5962-96624 (CD4015BMS) Other 0 KB
Intersil Commercial Lab Services Brochure PDF 364 KB
PA11003 - Packing Method Change for Intersil TO-xx Metal Can and Flat Pack Packaged Products Product Advisory PDF 499 KB

News & Additional Resources