This is the evaluation kit for the RC32504A and RC22504A point-of-use jitter attenuator and clock generators.  The board comes populated with an RC32504A device. The RC22504A is functionally a subset of the RC32504A, so this board can be used to evaluate either, or both, of the devices. Refer to the device pages for additional details on the products.

  • Jitter below 100fs RMS (10kHz to 20MHz)
  • Compliant with ITU-T G.8262 for synchronous Ethernet/OTN (EEC/OEC) and ITU-T G.8262.1 for enhanced synchronous Ethernet/OTN (eEEC/eOEC)
  • PLL core consists of fractional-feedback Analog PLL (APLL) which can optionally be steered by a Digital PLL (DPLL)
    • Operates from a 25MHz to 80MHz crystal or XO
    • APLL frequency independent of input/crystal frequency
    • Operates as a frequency synthesizer, jitter attenuator, synchronous equipment slave clock or Digitally Controlled Oscillator (DCO)
    • DPLL loop filter programmable from 0.1Hz to 12kHz
    • DCO has tuning granularity of < 1ppb
  • Programmable input buffer supports HCSL, LVDS, or two LVCMOS with no external terminations needed
    • Input frequencies: 1MHz to 800MHz (250MHz for LVCMOS)
    • Reference monitor qualifies/disqualifies input clock
  • Programmable status output
  • 4 differential/8 LVCMOS outputs
    • Any frequency from 10MHz to 1GHz (180MHz for LVCMOS)
    • Programmable output buffer supports HCSL (DC-coupled), LVDS/LVPECL/CML (AC-coupled) or two LVCMOS
    • Differential output swing is selectable: 400mV to 800mV
    • Output clock phase individually adjustable in 100ps steps
    • Output Enable input with programmable effect
  • Supports up to 1MHz I2C or up to 20MHz SPI serial processor port
  • Can configure itself automatically after reset through internal customer-definable One-Time Programmable (OTP) memory with up to four different configurations


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Manual - Development Tools
Application Note
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Manual - Software

Design & Development

Software Downloads

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Videos & Training

Lab on the Cloud Demo for Femtoclock®2 Ultra-Low Phase Noise Synthesizer and Jitter Attenuator

Demonstration of Renesas’ Lab on the Cloud virtual environment for Femtoclock®2 ultra-low phase noise synthesizer and jitter attenuator.

Lab on the Cloud

Lab on the Cloud

Renesas' Lab on the Cloud is an online environment where Renesas solutions, including popular evaluation boards, winning combinations and software, are hosted in a remote lab that customers access and test online.

FemtoClock®2 Evaluation Board

In this demo system, remotely connected timing devices perform the test and show the results on a single platform - the Lab on Cloud GUI without the need to download any tool in users’ system. The timing devices' evaluation boards are remotely connected through the server and are configured using the Lab on the Cloud GUI, which runs the RICBox tool in the backend to create the configuration files. In addition, the user has an option to import existing RICBox .rbs files. These configuration files are submitted to a TPD server, where the watcher script runs multiple functions to decode the device name, board ID, configurations etc. The settings are loaded on the board where the PNA (Phase Noise Analyser) takes all the measurements and sends the output file back to Lab on the Cloud GUI through the same server for the user to download the results.

Access the Lab