NOTICE - The following device(s) are recommended alternatives:
8P391208 - Low Additive Jitter 2:8 Buffer with Universal Differential Outputs

The 851021 is a 1-to-21 Differential HCSL Fanout Buffer. The 851021 is designed to translate any differential signal levels to differential HCSL output levels. An external reference resistor is used to set the value of the current supplied to an external load/termination resistor. The load resistor value is chosen to equal the value of the characteristic line impedance of 50 ohms. The 851021 is characterized at an operating supply voltage of 3.3V. The differential HCSL outputs, accurate crossover voltage and duty cycle make the 851021 ideal for interfacing to PCI Express® and FBDIMM applications.

Features

  • Twenty-one differential HCSL outputs
  • Translates any differential input signal (LVPECL, LVHSTL, LVDS, HCSL) to HCSL levels without external bias networks
  • Maximum output frequency: 250MHz
  • Output skew: 395ps (maximum)
  • Part-to-part skew: 335ps (maximum)
  • Output drift: 140ps (maximum)
  • VOH: 850mV (maximum)
  • Full 3.3V supply voltage
  • Available in lead-free (RoHS 6) packages
  • 0°C to 70°C ambient operating temperature

Product Options

Orderable Part ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
851021AYLF
Package Info
Env. Documentation
 Obsolete TQFP 64 C Yes Tray
Availability
Buy / Quote
851021AYLFT
Package Info
Env. Documentation
 Obsolete TQFP 64 C Yes Reel
Availability
Buy / Quote

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
851021 Datasheet – Datasheet PDF 489 KB
Application Notes & White Papers
AN-828 Termination - LVPECL – Application Note PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers – Application Note PDF 170 KB
AN-843 PCI Express Reference Clock Requirements – Application Note PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection – Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals – Application Note PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention – Application Note PDF 180 KB
AN-834 Hot-Swap Recommendations – Application Note PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels – Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced – Application Note PDF 160 KB
AN-827 Application Relevance of Clock Jitter – Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units – Application Note PDF 565 KB
AN-805 Recommended Ferrite Beads – Application Note PDF 121 KB
PCNs & PDNs
PDN# : CQ-17-04(R1) Product Discontinuance Notice – Product Discontinuation Notice PDF 606 KB
PDN# : CQ-17-04 Product Discontinuance Notice – Product Discontinuation Notice PDF 599 KB
PCN# : A1606-02 Add Greatek Taiwan as Alternate Assembly – Product Change Notice PDF 567 KB
PCN# : A1402-02 Alternate Assembly Locations – Product Change Notice PDF 34 KB
PCN# : TB1405-01 New Carrier Tape and Quantity per Reel – Product Change Notice PDF 788 KB
Downloads
851021 IBIS Model_RREF_475 – Model - IBIS ZIP 8 KB
Other
Clock Distribution Overview 日本語 Overview PDF 217 KB
PCI Express Timing Solutions Overview – Overview PDF 275 KB
Timing Solutions Products Overview – Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Fanout Buffers Product Overview – Product Brief PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief – Product Brief PDF 378 KB
info: For device-specific or order-specific documentation, submit a support request.

News & Additional Resources

Date
Comparing and Contrasting PCIe and Ethernet Clock Jitter Specifications May 21, 2018
IDT Extends Leadership in Datacenter and Networking Systems with Launch of Its Latest PCI Express Timing Devices Apr 30, 2018
An Insider’s Guide to Finding the Right Timing Device for Your System Dec 18, 2017
Why Fanout Buffers Make More Sense Nov 28, 2017
Time for Performance Oct 11, 2017
IDT Surpasses Milestone of 3 Million Low-Power PCIe Gen3 Buffers Shipped Dec 18, 2014