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Overview

Description

The 9FGL0241/51 devices are 2-output 3.3V PCIe Gen 1–6 clock generators. Each output has a dedicated OE# pin supporting PCIe CLKREQ# functionality. Two different spread spectrum levels, in addition to spread off, are supported. The 9FGL0241/51 supports PCIe Gen 1–6 Common Clocked architectures (CC), PCIe Separate Reference no Spread (SRNS), and Separate Reference Independent Spread (SRIS) clocking architectures.

Features

  • PCIe Gen 1–6 CC-compliant
  • Supports PCIe SRIS and SRNS clocking
  • Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output
  • Pin-selectable SRNS 0%, CC 0%, and CC/SRIS -0.5% spread
  • SMBus-selectable CC/SRIS -0.25% spread
  • One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support
  • Easy AC coupling to other logic families, see application note AN-891.
  • Space saving 4mm × 4mm 24-VFQFPN

Comparison

Applications

Documentation

Design & Development

Models

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

Diagram of ECAD Models

Models

Model - IBIS ZIP 89 KB
Model - IBIS ZIP 188 KB
2 items

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  1. Looking for product proposal, XO 100MHz dual output for PCIe Gen3, 26MHz for USB3.0

    ... 9FGL0241 https://www.renesas.com/us/en/products/clocks-timing/application-specific-clocks/pci-express-clocks/9fgl02-2-output-33v-pcie-gen1-6-clock-generator  5V41235NLG ? how about longevity? 5P49V6975 https://www.renesas.com/us/en/ ...

    Jul 12, 2024

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