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5T9310

Obsolete

1-to-10 LVDS Fanout Buffer

Overview

The 5T9310 is a low skew, 1-to-10 differential LVDS clock fanout buffer. The device has two selectable inputs. The inputs accept LVDS, HSTL, CML, LVPECL and single-ended signals such as 3.3V/2.5V LVCMOS/LVTTL. The 5T9310 outputs can be asynchronously enabled/disabled. When disabled, the outputs will drive to the value selected by the GL pin. Multiple power and grounds reduce noise.

5T9310 - Block Diagram
5T9310 - Block Diagram
  • Operating frequency range: 0-1000 MHz
  • Output skew: <25ps (maximum)
  • Duty cycle distortion: <125ps (maximum)
  • Selectable inputs
  • Hot insertable and over-voltage tolerant inputs
  • 3.3V/2.5V LVTTL, HSTL, LVPECL, CML or LVDS input interface
  • Power-down mode
  • 2.5V voltage supply
  • -40°C to 85°C ambient operating temperature

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

Explore ECAD Models
Diagram of ECAD Models

Models
Type Title Date
Model - IBIS
5T9310 IBIS Model
ZIP 6 KB
1 item

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