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74ALVCH32244

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3.3V CMOS 32-Bit Buffer/Driver with 3-State Outputs and Bus-Hold

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Overview

The 74ALVCH32244 high-speed, low power 32-bit buffer/driver offers bus/backplane interface capability with improved packing density. The three-state controls operate this device in a Quad-Nibble, Dual-Byte or single 16-bit word mode. The 74ALVCH32244 has "bus-hold" which prevents floating inputs and eliminates the need for pull-up/down resistors. The 74ALVCH32244 operates at -40C to +85C

74ALVCH32244 Block Diagram 2
74ALVCH32244 Block Diagram 2
  • Typical tSK(o) (Output Skew) < 250ps
  • ESD > 2000V per MIL-STD-883, Method 3015
  • > 200V using machine model (C = 200pF, R = 0)
  • VCC = 3.3V ± 0.3V, Normal Range
  • VCC = 2.7V to 3.6V, Extended Range
  • VCC = 2.5V ± 0.2V
  • CMOS power levels (0.4 uW typ. static)
  • Rail-to-Rail output swing for increased noise margin
  • Available in 96-ball LFBGA package

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ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

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Type Title Date
Model - IBIS
74ALVCH32244 IBIS model
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