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CMOS Serial Real-Time Clock With RAM and Power Sense/Control

パッケージ情報

CADモデル: View CAD Model
Pkg. Type: SOICW
Pkg. Code: MYF
Lead Count (#): 16
Pkg. Dimensions (mm): 10.34 x 7.52 x 0.20
Pitch (mm): 1.27

環境及び輸出分類情報

Moisture Sensitivity Level (MSL) 3
ECCN (US) EAR99
HTS (US) 8542.39.0090
Pb (Lead) Free Yes

製品スペック

Carrier Type Tube
Moisture Sensitivity Level (MSL) 3
Country of Assembly PHILIPPINES
Country of Wafer Fabrication UNITED STATES
Frequency Range (MHz) 0.032 - 4
IS (mA) 0.08
Lead Count (#) 16
Length (mm) 10.3
MOQ 480
Oscillator Type CRYSTAL or EXT CLK
Pb (Lead) Free Yes
Pb Free Category Pb-Free 100% Matte Tin Plate w/Anneal-e3
Pitch (mm) 1.3
Pkg. Dimensions (mm) 10.3 x 7.5 x 0.20
Pkg. Type SOICW
Price (USD) $14.95031
Supply Voltage Vcc Range 3-6
Temp. Range (°C) -40 to +85°C
Thickness (mm) 0.2
Width (mm) 7.5

説明

The CDP68HC68T1 Real-Time Clock provides a time/calendar function, a 32 byte static RAM, and a 3 wire Serial Peripheral Interface (SPI Bus). The primary function of the clock is to divide down a frequency input that can be supplied by the on-board oscillator in conjunction with an external crystal or by an external clock source. The internal oscillator can operate with a 32kHz, 1MHz, 2MHz, or 4MHz crystal. An external clock source with a 32kHz, 1MHz, 2MHz, 4MHz, 50Hz or 60Hz frequency can be used to drive the CDP68HC68T1. The time registers hold seconds, minutes, and hours, while the calendar registers hold day-of-week, date, month, and year information. The data is stored in BCD format. In addition, 12 or 24 hour operation can be selected. In 12 hour mode, an AM/PM indicator is provided. The T1 has a programmable output which can provide one of seven outputs for use elsewhere in the system. Computer handshaking is controlled with a wired-OR interrupt output. The interrupt can be programmed to provide a signal as the result of:

  1. An alarm programmed to occur at a predetermined combination of seconds, minutes, and hours.
  2. One of 15 periodic interrupts ranging from sub-second to once per day frequency.
  3. A power fail detect. The PSE output and the VSYS input are used for external power control. The CPUR output is available to reset the processor under power-down conditions. CPUR is enabled under software control and can also be activated via the CDP68HC68T1's watchdog. If enabled, the watchdog requires a periodic toggle of the CE pin without a serial transfer.