Overview
Features
- 2 - CPU differential low power push-pull pairs
- 7 - SRC differential push-pull pairs 1 - CPU/SRC selectable differential low power push-pull pair
- 1 - SRC/DOT selectable differential low power push-pull pair 1 - SRC/SE selectable differential push-pull pair/Single-ended
- CPU outputs cycle-cycle jitter 85ps
- SRC output cycle-cycle jitter 125ps
- PCI outputs cycle-cycle jitter 250ps
- +/- 100ppm frequency accuracy on all outputs
- SRC outputs meet PCIe Gen2 when sourced from PLL3
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
Product Options
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