Overview
Description
The DAC1408D750HN is a high-speed 14-bit dual channel Digital-to-Analog Converter (DAC) with selectable 2x, 4x or 8x interpolating filters optimized for multi-carrier WCDMA transmitters. Because of its digital on-chip modulation, the DAC1408D750 allows the complex I and Q inputs to be converted up from baseband to IF. The mixing frequency is adjusted via a Serial Peripheral Interface (SPI) with a 32-bit Numerically Controlled Oscillator (NCO) and the phase is controlled by a 16-bit register. The DAC1408D750 also includes a 2x, 4x or 8x clock multiplier which provides the appropriate internal clocks and an internal regulation to adjust the output full scale current.
Features
- 1.8 V and 3.3 V power supplies
- 750 Msps maximum update rate
- ACPR: 71 dBc
- two carriers WCDMA
- fs = 737.28 Msps
- fo = 153.6 MHz
- Differential CML receiver with embedded termination
- Differential scalable output current from 1.6 mA to 22 mA
- Dual 14-bit resolution
- Embedded complex modulator
- External analog offset control (10-bit auxiliary DACs)
- Four JESD204A serial input lanes
- Fully compatible SPI port
- IMD3: 80 dBc
- fs = 737.28 Msps
- fo = 140 MHz
- Industrial temperature range from -40°C to +85°C
- Input data rate up to 312.5 Msps
- Integrated PLL can be bypassed
- Internal digital offset control
- Inverse (sin x) / x function
- LMF = 421 or LMF = 211 support
- LVDS compatible clock inputs
- On-chip 1.29 V reference
- Power-down mode and Sleep modes
- Selectable 2x, 4x or 8x interpolation filters
- Synchronization of multiple DAC outputs
- 2's complement or binary offset data format
- Typical 1.28 W power dissipation at 4x interpolation, PLL off and 740 Msps
- Very low noise cap free integrated PLL
Comparison
Applications
Documentation
Featured Documentation
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| Type | Title | Date |
| Datasheet | PDF 623 KB | |
| End Of Life Notice | PDF 525 KB | |
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Design & Development
Boards & Kits
Demonstration
DAC1408D750W1
Obsolete
DAC1408D750W1 demo board with Virtex 5 FPGA
IDT's DAC1408D750W1 demo board is suitable for dynamic performance evaluations from low to high outputs frequency configuration. The FPGA eases the evaluation and analysis of the DAC dynamic performance and enables usage of the JESD204A full features set (e.g. Multiple DAC Synchronization)
Recommended Documents:
Demonstration
DAC1408D750WO
Obsolete
DAC1408D750W0 demo board
IDT's DAC1408D750W0 demo board is suitable for dynamic performance evaluation from low to high outputs frequency configuration. A FPGA mother board (Xilinx, Altera, and Lattice) can be connected to ease the evaluation and analysis of the DACs dynamic performance and enable usage of the JESD204A...
Recommended Documents:
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
Product Options
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