Renesas Blog

Chiaki introduces an efficient development environment that reduces porting resources between different CPU such as Arm and RISC-V.

The Renesas Engineering Community, formerly RenesasRulz, is a great resource to get online technical support on our popular product lines.

Welcoming you to accelerate functional safety solution deployment by using a comprehensive Renesas Functional Safety Package, the integral part for developers.

HVPAK chips combine resources to design both flexible motor control and mixed-signal logic using a single chip. Free GUI-based Go Configure™ Software Hub makes the design process intuitive and swift.

The RISC-V platform continues to gain interest and momentum, the Renesas RISC-V ASSP Easy devices lower the barriers to entry with turnkey reference solutions for quick time to market.

The AT25EU SPI NOR Flash family offers designers a radically more energy-efficient solution for code storage, event logging, and data logging applications.

This blog gives a basic introduction to the evolution of some of the functional safety standards including how and why they have been introduced.

Endpoint AI transforms IoT devices that are used to compute data into smarter tools that showcase AI features, equipping them with real-time decision-making capabilities and functionalities.

This series introduces the history and the future of the software for the 32-bit RX family MCU, which Renesas has developed and provided to users for developing applications with minimal or no coding. This fifth blog is about a modern approach to software development for the RX family.

Embracing open RAN initiatives, Renesas has joined the movement to enable emerging and existing wireless RAN OEMs with innovative RF, timing, power management, optical, and low-power edge AI solutions.