The RG5D188 (MDB) is an MCR DIMM Data Buffer. Its primary function is to demultiplex and buffer data from the host CPU to DRAMs. It has two 4-bit data interfaces to the host, running at twice the speed of the DRAM interfaces. Each host interface multiplexes two pseudo-channels, both of which have a separate 4-bit DRAM interface. The RG5D188 supports x4 or x8 DRAMs. It also has an input-only control bus interface that is connected to an MRCD, as well as a dedicated pin for ZQ Calibration and loopback outputs for test purposes.


  • Pinout optimized MCR DIMM PCB layout
  • MCR DIMM Server speeds up to 8800MT/s
  • Supports power-down modes to conserve server power
  • Supports 1 rank per pseudo-channel in x4 and up to 2-ranks per pseudo-channel in x8 MCR DIMM configurations
  • Supports SDP and 3DS DRAM types
  • Provides access to internal control words for configuring device features and adapting to different MCR DIMM and system applications
  • Loopback and pass-through modes
  • Training support features for DQ and MDQ interfaces
  • ZQ calibration




  • MCR DIMM modules for Enterprise Servers

Design & Development