
Renesas asynchronous FIFO products are a form of memory that allows data processing to continue before the transmission has finished. The asynchronous FIFOs use full and empty flags to prevent data overflow and underflow and expansion logic to allow for unlimited expansion capability in both word size and depth. Combining parallel asynchronous FIFOs allows various word sizes while serial asynchronous FIFO communication simplifies data transfer.
Asynchronous FIFOs are a type of data buffer, where the first byte to arrive at the input is the first to leave at the output. In a computer system, the operating system’s algorithm schedules CPU time for each process according to the order in which it is received. An asynchronous FIFO will queue the data and release it in a sequential fashion.
Renesas asynchronous FIFOs are typically used for the synchronization of CPU and other computer hardware. FIFOs are generally implemented as a circular queue, and thus have a read and write pointer. Synchronous FIFOs use clocks for reading and writing, while asynchronous FIFOs are usually controlled by asynchronous signals.
Key parameters for choosing an asynchronous FIFO include:
Core Voltage (V) |
Bus Width (bits) |
Density (Kb) |
Pkg. Code |
Interface |
I/O Type |
Organization |
Temp. Range |
Architecture |
Access Time (ns) |
105°C Max. Case Temp. |
|
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Part Number | |||||||||||
256 x 9 AsyncFIFO, 5.0V | 5 | 9 | 2 | PEG28, PLG32 | Asynchronous | 5.0 V TTL | 256 x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 12, 15 | |
512 x 9 AsyncFIFO, 5.0V | 5 | 9 | 4 | PEG28, PLG32, PTG28 | Asynchronous | 5.0 V TTL | 512 x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 12, 15 | |
1K x 9 AsyncFIFO, 5.0V | 5 | 9 | 9 | PEG28, PLG32, PTG28 | Asynchronous | 5.0 V TTL | 1K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 12, 15, 50 | |
2K x 9 AsyncFIFO, 5.0V | 5 | 9 | 18 | PLG32, PTG28 | Asynchronous | 5.0 V TTL | 2K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 12, 15 | |
4K x 9 AsyncFIFO, 5.0V | 5 | 9 | 36 | PEG28, PLG32, PTG28 | Asynchronous | 5.0 V TTL | 4K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 12, 15 | |
8K x 9 AsyncFIFO, 5.0V | 5 | 9 | 72 | PLG32, PTG28 | Asynchronous | 5.0 V TTL | 8K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 12, 15 | |
16K x 9 AsyncFIFO, 5.0V | 5 | 9 | 144 | PLG32 | Asynchronous | 5.0 V TTL | 16K x 9 | 0 to 70°C | Uni-directional | 15 | |
32K x 9 AsyncFIFO, 5.0V | 5 | 9 | 288 | PLG32 | Asynchronous | 5.0 V TTL | 32K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 15, 20 | |
64K x 9 AsyncFIFO, 5.0V | 5 | 9 | 512 | PLG32 | Asynchronous | 5.0 V TTL | 64K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 20, 25 | |
1K x 16 Parallel-to-Serial FIFO, 5.0V | 5 | 16 | 16 | PEG28, PTG28 | Asynchronous | 5.0 V TTL | 1K x 16 | 0 to 70°C | Parallel/Serial FIFOs | 25 | |
1K x 9 DualAsync FIFO, 5.0V | 5 | 9 | 9 | PAG56 | Asynchronous | 5.0 V TTL | 1K x 9 | 0 to 70°C | Dual FIFO | 12 | |
512 x 9 AsyncFIFO, 3.3V | 3.3 | 9 | 4 | PLG32 | Asynchronous | 3.3 V LVTTL | 512 x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 15, 25 | |
1K x 9 AsyncFIFO, 3.3V | 3.3 | 9 | 9 | PLG32 | Asynchronous | 3.3 V LVTTL | 1K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 15, 25 | |
2K x 9 AsyncFIFO, 3.3V | 3.3 | 9 | 18 | PLG32 | Asynchronous | 3.3 V LVTTL | 2K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 15, 25 | |
4K x 9 AsyncFIFO, 3.3V | 3.3 | 9 | 36 | PLG32 | Asynchronous | 3.3 V LVTTL | 4K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 15, 25 | |
8K x 9 AsyncFIFO, 3.3V | 3.3 | 9 | 72 | PLG32 | Asynchronous | 3.3 V LVTTL | 8K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 15, 25 | |
16K x 9 AsyncFIFO, 3.3V | 3.3 | 9 | 144 | PLG32 | Asynchronous | 3.3 V LVTTL | 16K x 9 | -40 to 85°C, 0 to 70°C | Uni-directional | 15, 25 |
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PDF 1.82 MB | Overview | |
PDF 97 KB | Guide | |
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