
The RF buffer portfolio features devices with very low noise floor characteristics and a negligible additive phase noise. Connected to Renesas synchronizers and JESD204B/C clock jitter attenuators, the devices extend the output signal fanout without compromising AC performance. The low-skew outputs keep the distributed signals phase aligned. Single and dual-channel architectures are available for the distribution of clock and synchronization signals in JESD204B/C systems. The devices support a differential I/O architecture and frequencies in the high-MHz and GHz range. Additional flexibility is provided by configurable phase delay, output format, and amplitude control, phase alignment across multiple devices. Integrated frequency dividers scale a high input frequency to a lower output frequency.
Outputs (#) |
Inputs (#) |
Divider Value |
Channels (#) |
Input Freq (MHz) |
Output Freq Range (MHz) |
Output Skew (ps) |
Adjustable Phase |
Noise Floor (dBc/Hz) |
Additive Phase Jitter Typ RMS (fs) |
Output Type |
Supply Voltage (V) |
Advanced Features |
Temp. Range |
Pkg. Type |
Lead Count (#) |
105°C Max. Case Temp. |
|
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Part Number | |||||||||||||||||
Low Skew,1-to-6,Differential-to-2.5V,3.3V LVPECL/ECL Fanout Buffer | 6 | 2 | 1 | 0 - 2000 | 0 - 2000 | 50 | No | 100 | LVPECL | 2.5, 3.3 | -40 to 85°C | TSSOP | 20 | ||||
Low Skew,1-to-2,Differential-to-2.5V,3.3V LVPECL/ECL Fanout Buffer | 2 | 1 | 1 | 0 - 2500 | 0 - 2500 | 5 | No | 26 | ECL, LVPECL | 2.5, 3.3 | -40 to 85°C | SOIC, TSSOP | 8 | ||||
Low Skew,1-to-5 Differential-to-2.5V,3.3V LVPECL/ECL Fanout Buffer | 5 | 2 | 1 | 0 - 2000 | 0 - 2000 | 55 | No | 100 | LVPECL | 2.5, 3.3 | -40 to 85°C | TSSOP | 20 | ||||
Low Skew,1-to-12,Differential-to-3.3V,2.5V LVPECL Fanout Buffer | 12 | 1 | 1 | 0 - 1500 | 0 - 1500 | 50 | No | 60 | LVPECL | 2.5, 3.3 | -40 to 85°C | VFQFPN | 32 | ||||
2:1 Differential-to-LVDS Multiplexer | 1 | 2 | 1 | 0 - 2500 | 0 - 2500 | No | 60 | LVDS | 3.3 | -40 to 85°C | VFQFPN | 16 | |||||
1:2 LVDS 1.8V / 2.5V Fanout Buffer for 1PPS and High-Speed Clocks | 2 | 1 | 1 | 0 - 1200 | 0 - 1200 | 20 | No | -162 | 42 | LVDS | 1.8 | -40 to 85°C | VFQFPN | 16 | |||
1:6 LVDS Output 1.8V Fanout Buffer | 6 | 1 | 1 | 0 - 1200 | 0 - 1200 | 20 | No | -162 | 39 | LVDS | 1.8 | -40 to 85°C | VFQFPN | 20 | |||
2:4 LVDS 1.8V / 2.5V Fanout Buffer for 1PPS and High-Speed Clocks | 4 | 2 | 1 | 0 - 1200 | 0 - 1200 | 14 | No | -162 | 42 | LVDS | 1.8 | -40 to 85°C | VFQFPN | 16 | |||
2:8 LVDS 1.8V / 2.5V Fanout Buffer for 1PPS and High-Speed Clocks | 8 | 2 | 1 | 0 - 1200 | 0 - 1200 | 20 | No | -162 | 41 | LVDS | 1.8 | -40 to 85°C | VFQFPN | 28 | |||
2:12 LVDS 1.8V / 2.5V Fanout Buffer for 1PPS and High-Speed Clocks | 12 | 2 | 1 | 0 - 1200 | 0 - 1200 | 12 | No | -162 | 73 | LVDS | 1.8 | -40 to 85°C | VFQFPN | 40 | |||
Dual 1:2 LVDS 1.8V / 2.5V Fanout Buffer for 1PPS and High-Speed Clocks | 4 | 2 | 2 | 0 - 2000 | 0 - 2000 | 30 | No | -160 | 45 | LVDS | 1.8 | Dual Buffer, Output Amplitude Control | -40 to 85°C (Tc ≤ 105°C) | VFQFPN | 16 | Yes | |
Dual 1:4 LVDS 1.8V / 2.5V Fanout Buffer for 1PPS and High-Speed Clocks | 8 | 2 | 2 | 0 - 2000 | 0 - 2000 | 30 | No | -160 | 45 | LVDS | 1.8 | Dual Buffer, Output Amplitude Control | -40 to 85°C (Tc ≤ 105°C) | VFQFPN | 28 | Yes | |
Dual 1:6 LVDS Output 1.8V / 2.5V Fanout Buffer | 12 | 2 | 2 | 0 - 2000 | 0 - 2000 | 40 | No | -160 | 45 | LVDS | 1.8, 2.5 | Dual Buffer, Output Amplitude Control | -40 to 85°C (Tc ≤ 105°C) | WLCSP | 48 | Yes | |
Dual 1:6 LVDS Output 1.8V / 2.5V Fanout Buffer | -40 to 85°C | VFQFPN | 40 | ||||||||||||||
Dual 1:8 LVDS 1.8V / 2.5V Fanout Buffer for 1PPS and High-Speed Clocks | 16 | 2 | 2 | 0 - 2000 | 0 - 2000 | 40 | No | -160 | 45 | LVDS | 1.8 | Dual Buffer, Output Amplitude Control | -40 to 85°C (Tc ≤ 105°C) | VFQFPN | 48 | Yes | |
Low Additive Jitter 2:8 Buffer with Universal Differential Outputs | 8 | 2 | 2 | 0.000001 - 1000 | 0.000001 - 1000 | 100 | No | -153 | 70 | CML, HCSL, LVDS, LVPECL | 1.8 - 3.3 | -40 to 85°C | VFQFPN | 32 | |||
Low Additive Jitter 2:8 Buffer with CMOS / Differential Outputs | 8 | 2 | 2 | 100 | No | -156 | 80 | LVCMOS, LVDS, LVPECL | -40 to 85°C | VFQFPN | 32 | ||||||
Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs | 8 | 2 | 2, 511 | 2 | 0.000001 - 700 | 0.000001 - 700 | 100 | No | -154 | 60 | CML, HCSL, LVDS, LVPECL | -40 to 85°C | VFQFPN | 32 | |||
2:4, LVDS Output Fanout Buffer, 2.5V | 4 | 2 | 1 | 0 - 2000 | 0 - 2000 | 20 | No | -160 | 95 | LVDS | 2.5 | -40 to 85°C | VFQFPN | 16 | |||
2:4, LVDS Output Fanout Buffer, 3.3 V | 4 | 2 | 1 | 0 - 2000 | 0 - 2000 | 20 | No | -160 | 95 | LVDS | 3.3 | -40 to 85°C | VFQFPN | 16 | |||
1:8, LVDS Output Fanout Buffer | 8 | 2 | 1 | 0 - 2000 | 0 - 2000 | 20 | No | -160 | 82 | LVDS | 3.3 | -40 to 85°C | VFQFPN | 28 | |||
1:12, LVDS Output Fanout Buffer | 12 | 2 | 1 | 0 - 2000 | 0 - 2000 | 45 | No | -160 | 65 | LVDS | 2.5 | -40 to 85°C | VFQFPN | 40 | |||
Dual 1:4, LVDS Output Fanout Buffer | 8 | 2 | 2 | 0 - 2000 | 0 - 2000 | 35 | No | -160 | 105 | LVDS | 2.5 | Dual Buffer | -40 to 85°C | VFQFPN | 28 | ||
1:2,LVPECL Output Fanout Buffer | 2 | 1 | 1 | 0 - 2000 | 0 - 2000 | 15 | No | -162 | 36 | LVPECL | 2.5, 3.3 | -40 to 85°C | VFQFPN | 16 | |||
Low Phase Noise,1-to-4, 3.3V, 2.5V LVPECL Output Fanout Buffer | 4 | 1 | 1 | 0 - 2000 | 0 - 2000 | 15 | No | -162 | 32 | LVPECL | 2.5, 3.3 | -40 to 85°C | VFQFPN | 16 | |||
2:4 LVPECL Output Fanout Buffer | 4 | 2 | 1 | 0 - 2000 | 0 - 2000 | 64 | No | -160 | 32 | LVPECL | 2.5, 3.3 | -40 to 85°C (Tc ≤ 105°C) | VFQFPN | 16 | Yes | ||
2:8,LVPECL Output Fanout Buffer | 8 | 2 | 1 | 0 - 2000 | 0 - 2000 | 64 | No | -162 | 31.1 | LVPECL | 2.5, 3.3 | -40 to 85°C | VFQFPN | 28 | |||
2:12,3.3V,2.5V LVPECL Fanout Buffer | 12 | 2 | 1 | 0 - 2000 | 0 - 2000 | 15 | No | -160 | 45 | LVPECL | 2.5, 3.3 | -40 to 85°C | VFQFPN | 40 | |||
Dual 1:2, 3.3V, 2.5V LVPECL Output Fanout Buffer | 4 | 2 | 2 | 0 - 2000 | 0 - 2000 | 15 | No | -162 | 31 | LVPECL | 2.5, 3.3 | Dual Buffer | -40 to 85°C | VFQFPN | 16 | ||
Dual 1:4, 3.3V, 2.5V LVPECL Output Fanout Buffer | 8 | 2 | 2 | 0 - 2000 | 0 - 2000 | 25 | No | -162 | 43 | LVPECL | 2.5, 3.3 | Dual Buffer | -40 to 85°C (Tc ≤ 105°C) | VFQFPN | 28 | Yes | |
Dual 1:6, 3.3V, 2.5V LVPECL Output Fanout Buffer | 12 | 2 | 2 | 0 - 2000 | 0 - 2000 | 26 | No | -162 | 42 | LVPECL | 2.5, 3.3 | Dual Buffer | -40 to 85°C (Tc ≤ 105°C) | VFQFPN | 40 | Yes | |
Dual 1:8, 3.3V, 2.5V LVPECL Output Fanout Buffer | 16 | 2 | 2 | 0 - 2000 | 0 - 2000 | 25 | No | -162 | 43 | LVPECL | 2.5, 3.3 | Dual Buffer | -40 to 85°C | VFQFPN | 48 | ||
1:18, 2.5V, 3.3V Selectable LVPECL or LVDS Fanout Buffer | 18 | 1 | 1 | 0 - 2000 | 0 - 2000 | 40 | No | -160 | 39 | LVDS, LVPECL | 2.5, 3.3 | -40 to 85°C | VFQFPN | 48 | |||
JESD204B Compliant Fanout Buffer and Divider | 16 | 2 | 1, 2, 4, 8, 12, 16 | 2 | 0 - 3000 | 0 - 3000 | 100 | Yes | -158.8 | LVDS, LVPECL | 3.3 | Dual Buffer, Individual output bank enable and more... |
-40 to 85°C (Tc ≤ 105°C) | VFQFPN | 64 | Yes | |
JESD204B/C Compliant Fanout Buffer and Divider | 16 | 2 | 1, 2, 3, 4, 6, 8, 12, 16, 24 | 2 | 0 - 3000 | 0 - 3000 | 100 | Yes | -158.8 | LVDS, LVPECL | 3.3 | Dual Buffer, Individual output bank enable and more... |
-40 to 85°C (Tc ≤ 105°C) | VFQFPN | 64 | Yes |