Radio synchronizers and JESD204B/C clock jitter attenuators offer industry-leading phase noise for best 4G/5G radio EVM performance, excellent close-in phase noise for enhanced Common Public Radio Interface (eCPRI) and CPRI applications, and high fanout for high-density radios.

Single-chip radio synchronization devices integrate digital PLLs (DPLLs) with a high-performance RF PLL and support PTP (Precision Timing Protocol, IEEE 1588), synchronous Ethernet, 1PPS input and output signals, and a tight phase alignment.

These devices remove virtually all noise from an input reference clock, making them suitable for the data converter reference clock generation and synchronization.


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8V19N880, 8V19N882 Low-Power 4G & 5G RF Clock Jitter Attenuators

The 8V19N880 and 8V19N882 JESD204B/C clock jitter attenuators deliver low phase noise and exceptional jitter performance as low as 74fs RMS and -90dB spurious attenuation for mission-critical industrial data converter applications in wireless radio, test and measurement, instrumentation, and high-performance imaging. They support frequencies up to 3932.16MHz (up to 6GHz with an external VCO) and feature 16 and 18 integrated differential outputs to deliver a first-in-class balance of high performance, low voltage and low power consumption with 1.8V support.

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