The 9FGV0641 is a member of IDT's SOC-Friendly 1.8V Very-Low-Power PCIe clock family. The device has integrated 100 ohm output terminations providing direction connection to 100 ohm transmission lines. The device also has 6 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.
For information regarding evaluation boards and material, please contact your local IDT sales representative.
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Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
IDT’s chief PCIe system architect explains the fundamental difference in reference clock jitter budgets between the first three generations of the specification and those of Gen4 and Gen5 which raise new challenges for designers.
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