概要

The Intersil HCTS20MS is a Radiation Hardened Dual 4-Input NAND Gate. A low on any input forces the output to a High state. The HCTS20MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS20MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).

HCTS20MS Functional Diagram
HCTS20MS Functional Diagram
  • 3 Micron Radiation Hardened SOS CMOS
  • Total Dose 200K RAD (Si)
  • SEP Effective LET No Upsets: >100 MEV-cm2/mg
  • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
  • Dose Rate Survivability: >1 x 1012 RAD (Si)/s
  • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
  • Latch-Up Free Under Any Conditions
  • Military Temperature Range: -55°C to +125°C
  • Significant Power Reduction Compared to LSTTL ICs
  • DC Operating Voltage Range: 4.5V to 5.5V
  • LSTTL Input Compatibility
  • VIL = 0.8V Max
  • VIH = VCC/2 Min
  • Input Current Levels Ii ≤ 5µA at VOL, VOH

ドキュメント

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Carrier Type
    MOQ
    DLA SMD
    ご購入 / サンプル
    型名
    HCTS20KMSR
    circle廃止品
    memory
    view_in_ar
    		CFP Tray 25 5962R9573301VXC
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