概要
説明
The ADC1443D200HD is a dual-channel, 14-bit analog-to-digital converter (ADC) with JESD204B serial output interface optimized for high dynamic performance and low power consumption at sample rates up to 185Msps. Pipelined architecture and output error correction ensure the ADC1443D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 1.8V source, the ADC1443D complies with the JESD204B serial output standard. An integrated serial peripheral interface (SPI) allows easy configuration of the ADC. With excellent dynamic performance from the baseband to input frequencies of 250MHz or more, the ADC1443D is ideal for use in undersampled multi-carrier, multi-standard communication system applications.
特長
- Dual channel 14-bit ADC, sampling rate up to 185Msps
- JESD204B device Subclass 0, Subclass 1, Subclass 2 support
- SYSREF-based deterministic and repeatable interface latency
- Multiple device synchronization and harmonic clocking
- 2-lane JESD204B serial output interface
- Clock input divider from 1 to 8
- Duty cycle stabilizer
- Flexible analog input 1V (p-p) to 2V (p-p)
- Offset binary and 2s complement and gray output data
- Power-down and sleep modes
- Serial peripheral interface (SPI)
- Single 1.8V supply
- Industrial temperature range
- PtP compatible with ADC1453D device
製品比較
アプリケーション
設計・開発
ボード＆キット
Demonstration
ADC1443D200W1
廃止品
ADC1443D200W1 Demo Board with ARRIA II GX FPGA
The IDT ADC demo board is suitable for dynamic performance evaluations from low to high IF configuration. The FPGA eases the evaluation and analysis of the ADC dynamic and enables use of the full JESD204B feature set.
Recommended Documents:
Demonstration
ADC1443D200WO
廃止品
ADC1443D200W0 demo board; compliant with Altera, Xilinx FPGA boards through specific connectors
The IDT ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration. A FPGA mother board (Xilinx, Altera ) could be connected to ease the evaluation and analysis of the ADC dynamic and enable usage of the JESD204B full features sets.
Recommended Documents:
モデル
ECADモデル
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製品選択
適用されたフィルター