概要

Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for DDR2 RDIMMs for 400, 533, 667 and 800MHz.

  • 14-bit 1:2 registered buffer with parity check functionality
  • Supports SSTL_18 JEDEC specification on data inputs and outputs
  • 50% more dynamic driver strength than standard SSTU32864
  • Supports LVCMOS switching levels on C1 and RESET# inputs
  • Low voltage operation

ドキュメント

= ピックアップ
分類 タイトル 日時
データシート
74SSTUBF32869A Datasheet
PDF 493 KB
EOL通知
PDN# : CQ-20-05 End-of-Life (EOL) Process on Select Part Numbers
PDF 720 KB
製品変更通知
PCN#: A1309-03 Additional Assembly Sources
PDF 398 KB
3 items

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    ご購入 / サンプル
    型名
    74SSTUBF32869ABKG
    circle廃止品
    memory
    view_in_ar
    		CABGA 150 C Yes Tray
    74SSTUBF32869ABKG8
    circle廃止品
    memory
    view_in_ar
    		CABGA 150 C Yes Reel
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