Package Information
| Pkg. Type | TFBGA |
| Pkg. Code | pkg_11760 |
| Lead Count (#) | 144 |
| Pkg. Dimensions (mm) | 18.5 x 11 x 1.2 |
Environmental & Export Classifications
| ECCN (US) | 5A002 |
| RoHS (UPD48576218F1-E24-DW1-A) | EnglishJapanese |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| HTS (US) |
Product Attributes
| Pkg. Type | TFBGA |
| Carrier Type | Tray |
| Architecture | Low Latency DRAM-II |
| Burst Length (Words) | 2 |
| Data Width (bits) | 18000 |
| Density (Kb) | 576000 |
| Frequency (Max) (MHz) | 400 |
| I/O Voltage (V) | 1.5/1.8 - 1.5/1.8 |
| Lead Compliant | Yes |
| Lead Count (#) | 144 |
| Length (mm) | 18 |
| MIN Frequency (MHz) | 175 |
| MOQ | 1 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| Pkg. Dimensions (mm) | 18 x 11 x 1.2 |
| Supply Voltage (V) | 1.8 - 1.8 |
| Tape & Reel | No |
| Thickness (mm) | 1.2 |
| Width (mm) | 11 |
| tRC (ns) | 15 |
Description
The µPD48576209F1 is a 67, 108, 864-word by 9 bit, the µPD48576218F1 is a 33, 554, 432 word by 18 bit and the µPD48576236F1 is a 16, 777, 216 word by 36 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. The µPD48576209F1, µPD48576218F1 and µPD48576236F1 integrate unique synchronous peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (CK and CK#) are latched on the positive edge of CK and CK#. These products are suitable for application which require synchronous operation, High-Speed, low voltage, high density and wide bit configuration.