Overview
Description
The 72V3642 is a 3.3V version of the 723642. Two independent 1K x 36 dual-port SRAM FIFOs onboard each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.
Features
- Supports clock frequencies up to 100 MHz
- Fast access times of 6.5ns
- Two independent clocked FIFOs buffering data in opposite directions
- Programmable Almost-Full and Almost-Empty flags
- Microprocessor Interface Control Logic
- Select IDT Standard timing or First Word Fall Through timing
- Available in 120-pin TQFP package
- Industrial temperature range (–40C to +85C) is available
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
| TQFP | 120 | C | No | Tray | ||
| TQFP | 120 | C | No | Reel | ||
| TQFP | 120 | C | Yes | Tray | ||
| TQFP | 120 | C | Yes | Reel | ||
| PQFP | 132 | C | No | Tray | ||
| TQFP | 120 | C | No | Tray | ||
| TQFP | 120 | C | No | Reel | ||
| PQFP | 132 | C | No | Tray |
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