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AT45DB641E

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Product Longevity: 2034

64Mbit, 1.7 V to 3.6 V Range SPI Serial Flash Memory

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Overview

The AT45DB641E DataFlash is a member of our System Enhancing class of code and data storage solutions designed with an advanced dual SRAM buffer architecture that makes it the most efficient memory for data logging. It also incorporates a suite of advanced features that save system power, reduce processor overhead, simplify software development, and provide comprehensive data security and integrity options.

Main Memory - I/O Interface
Main Memory - I/O Interface
  • Includes controllable Dual R/W SRAM buffers for maximum flexibility
  • Standard block architecture with added 256-byte page erase for energy efficient Data Logging
  • Byte-write provides Serial EEPROM functionality in a Serial NOR Flash device
  • Extended Vcc operation allows the system memory to operate over the entire voltage range
  • Ultra-deep power down
  • Comprehensive security and unique ID features protect the device from outside tampering

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

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Diagram of ECAD Models

Models
Type Title Date
Model - IBIS
IBIS_AT45DB641E
ZIP 37 KB
1 item

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Resources

Support Communities

  1. About AT45DB641E

    Good afternoon! Do you mind me asking about chip AT45DB641E.   I'd like to know about the information: the bit "EPE" in the status register is set to "zero" if the record was successfull. Is that a guarantee of the right record or we must to execute "Main memory Page ...

    Jun 21, 2021
  2. What is the write limit for DataFlash products such as AT45DB641E?

    Can multiple writes to the same byte be performed without erase? Of course individual bits can only be set from 1 to 0. Unchanged bytes would be written as FFh in the buffer. I think documentation from the 8Mbit part several years back did specify this. The current documentation doesn ...

    Mar 16, 2023
  3. RSPI Master transfer/receive from Data Flash AT45DB641E issue

    Good Morning Renesas community, currently I am working on establishing connection between RX65N and Data Flash AT45DB641E using RSPI bus protocol. At the beginning I have initialized the RSPI1 on my MCU and wrote two separated functions for transfer and receive to and from slave device, then I faced an ...

    Aug 15, 2023