Overview
Description
The MC100ES60T22 is a low skew dual LVTTL/LVCMOS to differential LVPECL translator. The low voltage PECL levels, small package, and dual gate design are ideal for clock translation applications.
Features
- 280 ps typical propagation delay
- 100 ps max output-to-output skew
- LVPECL operating range: VCC = 3.135 V to 3.8 V
- 8-lead SOIC and 8-lead TSSOP packages
- Ambient temperature range –40°C to +85°C
- 8-lead SOIC Pb-free package available
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Product Options
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